tag:blogger.com,1999:blog-32446410277786998492024-03-27T16:53:28.139-07:00blog de VK5HSEErichhttp://www.blogger.com/profile/06713492721272257911noreply@blogger.comBlogger67125tag:blogger.com,1999:blog-3244641027778699849.post-47204342788027019882021-04-03T07:55:00.001-07:002021-04-06T03:26:13.965-07:00Modifiying T3 and T4 component testers for STEM and coding use in schools<p style="text-align: left; white-space: pre-wrap;">The open design component tester originally by Markus Frejek and subsequently developed further by Karl-Heinz Kübbeler is available from many sellers as a "T3" or "T4" component tester, complete with laser cut acrylic case, for as little as $11AUD delivered.</p><p style="text-align: left; white-space: pre-wrap;">These testers lend themselves to repurposing for any project that needs an Atmega328, 64x126 pixel screen with backlight, and simple I/O requirements.</p><p style="text-align: left; white-space: pre-wrap;">The open source project for the component tester design is hosted at <a href="https://www.mikrocontroller.net/articles/AVR_Transistortester">mikrocontroller.net</a> and as new designs are released by vendors, new code versions have been produced that will run on new variations of the hardware.</p><p style="text-align: left; white-space: pre-wrap;">The testers, as shipped from vendors, tend to look quite similar, and do not necessarily indicate what firmware revision they require, nor do they provide a schematic showing the pinouts, in particular, to the SPI LCD.</p><p style="text-align: left; white-space: pre-wrap;">The first step when repurposing is to create easy access to the ICSP port. A 10mm hole drilled 38mm down and 22mm in from the side, over the ICSP port, is ideal for use with a pogo pin fixture.</p><div class="separator" style="clear: both; text-align: center;"><a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiaIsxTVJGMet3KsVcAzMu0bEcrV3adzkwmr9VebEM9L5W2XRpckGT5enNh4FXY-jv7p_Pz4ztd3S0-tg2v486voDJA5LNBqM9eFDyGwaWPgmf6lbEsw__PhGlj1h7sbPtMOta6skMe8d9x/s2048/ICSP-access-port.jpg" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="2048" data-original-width="1613" height="320" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiaIsxTVJGMet3KsVcAzMu0bEcrV3adzkwmr9VebEM9L5W2XRpckGT5enNh4FXY-jv7p_Pz4ztd3S0-tg2v486voDJA5LNBqM9eFDyGwaWPgmf6lbEsw__PhGlj1h7sbPtMOta6skMe8d9x/s320/ICSP-access-port.jpg" /></a></div><p></p><p>The next step is make or obtain a pogo pin fixture</p><div class="separator" style="clear: both; text-align: center;"></div><div class="separator" style="clear: both; text-align: center;"><a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiU0hhkQY3xbOljpR0_w0VjK_-1gbuW-vZ_AYU855_8_odGLTCC-h2NBWJuwx1SMgE6RfxKj_KjcH6Sqy3UPftXXamY9yhlOvVVx822VWeNHASld43AD8u29CpNNRkibj66cMI7ezCg179P/s2048/usb-asp-and-pogo-pin-fixture.jpg" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="2048" data-original-width="1661" height="320" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiU0hhkQY3xbOljpR0_w0VjK_-1gbuW-vZ_AYU855_8_odGLTCC-h2NBWJuwx1SMgE6RfxKj_KjcH6Sqy3UPftXXamY9yhlOvVVx822VWeNHASld43AD8u29CpNNRkibj66cMI7ezCg179P/s320/usb-asp-and-pogo-pin-fixture.jpg" /></a></div><p>The GND terminal of the ICSP port is identifiable on account of it thermals, and continuity to the negative lead of the 9V battery. Here is the pinout for the currently shipping (at the time of writing) LCR-T4 v2:<br /></p><p></p><div class="separator" style="clear: both; text-align: center;"><a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEg7d00G_EHWjG3GPAKUBHbsh7BXCjc1xZfmdL4eCVvwiraakf_SIeEq2_Qq1J1doZKgxXlstZwXjGi4SnROAgLesTKimnkFpzqU1B44Z2OKTab5TUQqMr97R67J5nm_cN6YYtYjScp04hLK/s1689/ICSP-pinout-LCR-T4-v2.jpg" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="1392" data-original-width="1689" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEg7d00G_EHWjG3GPAKUBHbsh7BXCjc1xZfmdL4eCVvwiraakf_SIeEq2_Qq1J1doZKgxXlstZwXjGi4SnROAgLesTKimnkFpzqU1B44Z2OKTab5TUQqMr97R67J5nm_cN6YYtYjScp04hLK/s320/ICSP-pinout-LCR-T4-v2.jpg" width="320" /></a></div><br /><p></p><p>Although one can disassemble the device to figure out the pinout to the display, it is easier to backup the firmware with a programmer such as a USB-ASP, and then try the various versions of the Atmega328 firmware and eeprom binaries available from the <a href="https://github.com/Mikrocontr oller-net/transistortester/">Mikrocontroller-net</a> github repo in turn, seeing which version works.<br /></p><p></p><p></p><p></p><p>Scripts to simplify the backing up of the original firmware are available on <a href="https://github.com/Lobethal-Lutheran-School/">github.</a> Once backed up, you have the option of writing it back to the tester at a later point in time to restore its original functionality.<br /></p><p>Once you figure out which firmware works on your board, you will know which board revision you have, and you can then inspect the Makefile for that version to see what the pinouts are compared to other versions.</p><p>If you load Mikrocontroller-net firmware and only see a screen filled with a black rectangle, you have probably failed to install the matching eeprom code that goes with the particular firmware hex file. <br /></p><p>At the time of writing, currently shipping models appear to be T4-v2. These differ to the T3 with respect to the SPI pinout to the ST7565 LCD<br /> </p><p><span> </span><span> </span><span> </span><span> </span>T4v2 vs T3 <br /></p><p>reset<span> </span>PD0 vs PD4</p><p>SCL <span> </span>PD2 vs PD2</p><p>RS/SW<span> </span>PD1 vs PD3</p><p>SI/SDA<span> </span>PD3 vs PD1</p><p>CE<span> <span> </span></span>PD5 vs PD5 <br /><br />and these differences have to be reflected in the ST7565 driver code, namely, stlcd.h, for the T4 v2 component tester to work.</p><p>Back in 2017, Robson Couto got <a href="https://dragaosemchama.com/en/2017/01/rex/">Rex-Runner</a> working on the T3 model being shipped at the time with some C code and modifications to Adafuit's ST7565 LCD library, and put his code on <a href="https://github.com/robsoncouto/rex">github</a>.</p><p></p><p>Thanks to Robson Couto's efforts on the T3, Adafruit's LCD library, and Mikrocontroller-net's Makefiles for the various component tester designs in the the wild, I have been able to port the T3 Rex-Runner C code to the T4v2.</p><p>The code has undergone extensive refactoring, and additional code has been written to allow easy creation of custom sprites and viewing of sprites as ASCII once exported as a C header file from the GIMP.</p><p>The purpose of the exercise has been to create a cost effective and appealing platform for the delivery of coding and STEM content in the school environment.</p><p> </p><p></p><div class="separator" style="clear: both; text-align: center;"></div><div class="separator" style="clear: both; text-align: center;"></div><div class="separator" style="clear: both; text-align: center;"></div><div class="separator" style="clear: both; text-align: center;"><a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhW5nrbkigNBUrgBxqvmCMg0p2MHAsYiuOfCFoD20Qq33tjWrvaSW85PD5LxTzK7DunmdT3QVEYAshg7W_1y9M0TjsP2I8qqkwkI9Chml4vamkGXmpQJuyxe47W8zlnFn8DLmSTVhXAJusF/s2048/LLS-logo-on-screen.jpg" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="1207" data-original-width="2048" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhW5nrbkigNBUrgBxqvmCMg0p2MHAsYiuOfCFoD20Qq33tjWrvaSW85PD5LxTzK7DunmdT3QVEYAshg7W_1y9M0TjsP2I8qqkwkI9Chml4vamkGXmpQJuyxe47W8zlnFn8DLmSTVhXAJusF/s320/LLS-logo-on-screen.jpg" width="320" /></a></div> <p></p><p>This project is in its early stages, and the project aims to provide a platform allowing students to not only create custom sprites, but to also hold and take home embedded hardware that can be <b><i>programmed to do their bidding</i></b>. More adventurous students can modify the code further.<br /></p><p>As a demonstration, the dinosaur can be replaced with a dog sprite:</p><div class="separator" style="clear: both; text-align: center;"><a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhDVLRo38DGalvJ0nSjLATzCEyx3EGc2IrmGnRaF4ky43cqArfLVRgHf-WoCIJ4ztj5ioxpOEjKUpjh6BSdHOxf8oAfW0C8KfVfjIRklNSrZjT7hOARSSwavk6pLY-AidIb8PpYiEfc6vAX/s2048/dog-sprite-screen-shot.jpg" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="1347" data-original-width="2048" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhDVLRo38DGalvJ0nSjLATzCEyx3EGc2IrmGnRaF4ky43cqArfLVRgHf-WoCIJ4ztj5ioxpOEjKUpjh6BSdHOxf8oAfW0C8KfVfjIRklNSrZjT7hOARSSwavk6pLY-AidIb8PpYiEfc6vAX/s320/dog-sprite-screen-shot.jpg" width="320" /></a></div><br /><p>This project is being undertaken with the Lobethal Lutheran School in Lobethal, South Australia, as part of their STEM (Science, Technology, Engineering, Mathematics) promotion efforts and the <a href="https://github.com/Lobethal-Lutheran-School/LLS-STEM-Runner">code</a> is being hosted on the Lobethal Lutheran School <a href="https://github.com/Lobethal-Lutheran-School/">github repository.</a></p><p>Design files for the pogo-pin fixture are also available on <a href="https://github.com/erichVK5/VK5HSE-Pogo-Pin-Adaptor">github</a>, The pogo pin programming fixture was designed in <a href="http://repo.hu/projects/pcb-rnd">pcb-rnd</a> and uses custom padstacks for ease of soldering that assume pogo pins with nominally 1.3mm shafts are being used.<br /></p>Erichhttp://www.blogger.com/profile/06713492721272257911noreply@blogger.com1tag:blogger.com,1999:blog-3244641027778699849.post-84481041266125266242021-03-31T06:31:00.003-07:002021-03-31T11:52:55.600-07:00How to play the Snake game on your PCB layout in pcb-rnd with a user script<p>This is a screen capture of a user script in pcb-rnd being used to play the classic game "snake" on the top copper layer of a compact step attenuator PCB layout...<br /></p><div class="separator" style="clear: both; text-align: center;"><iframe allowfullscreen='allowfullscreen' webkitallowfullscreen='webkitallowfullscreen' mozallowfullscreen='mozallowfullscreen' width='472' height='393' src='https://www.blogger.com/video.g?token=AD6v5dz2BTYkf2TkT-Po3fHxgCOcrl36SzS4wdBHQz0IbJbrz8p-crHsaoZxUdiJ8GB8nfob7HTVXbYYzcYQZ31m6A' class='b-hbp-video b-uploaded' frameborder='0'></iframe></div><div><br /></div><div> </div><div>The video of the snake game script demonstrates how a script written by the user can </div><div><ul style="text-align: left;"><li>draw on the
printed circuit board in real-time</li><li>receive keyboard commands</li><li>create menus, and</li><li>run a simple simulation</li></ul></div><div> </div><div>It
implements the classic snake game, played on the currently selected
layer group on the currently loaded board.</div><div> </div><div>If the snake collides with itself or any copper feature, the game ends.</div><div> </div><div>At the end of the video the snake is made to deliberately perform a 180 degree turn, which causes the snake to collide with its own body and end the game.</div><div><br /></div><div>The video is a screen capture, and may have the odd broken frame, but in practice, the script
ran smoothly, without artifacts on the screen and felt like a fully immersive, first person real-time snake experience!</div><div><br /></div><div>To
run this, you'll need</div><div> </div><div><ul style="text-align: left;"><li>pcb-rnd 2.3.2 (or latest HEAD version of trunk from
svn), and</li><li>game_snake from http://edakrill.repo.hu found at http://repo.hu/cgi-bin/edakrill.cgi?cmd=show&krill=igor2/script/pcb-rnd/game_snake.krill<br /></li></ul></div><div> </div><div>Note: when loading as a
live script, the 'persistent' checkbox must be activated. </div><div><br /></div><div>Disclaimer:
the script is a demonstration of what is possible with user scripting - it doesn't pretend to implement things that are useful in production but shows how the various scripting features of
pcb-rnd can be used.</div>Erichhttp://www.blogger.com/profile/06713492721272257911noreply@blogger.com0tag:blogger.com,1999:blog-3244641027778699849.post-46253848818980018352019-04-01T00:11:00.001-07:002019-04-01T00:11:55.611-07:00Mounting PCB layouts as a file system!It goes without saying, that this is something we have all been waiting for since the dawn of UNIX and hierarchical file systems.<br />
<br />
Finally, we now have the ability to mount a pcb layout as a virtual filesystem, allowing metadata to be inspected and modified from within the terminal, with scripts, or from within midnight commander... or even from within Emacs!<br />
<br />
More observant readers will already have noted that someone using a single board computer can now mount the PCB layout of their single board computer on their single board computer filesystem and inspect their single board computer hardware from the command line of their single board computer.<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEi1CmWhHLoqozrENbhxOxLQsewDjqV0xYcsh55wvSsMppJfYqKmcgiX4ZjQDcTH02SETYxoT5ZQeXqREfrZMz6az33IwsSX04MRUqNhZ_EpEOeCqvvNQGDr6b0EZWr94J-o_ISOi_A5mpbM/s1600/pcb-rnd-pcb-as-virtual-filesystem-in-emacs-file-browser-and-midnight-commander.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="739" data-original-width="1366" height="173" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEi1CmWhHLoqozrENbhxOxLQsewDjqV0xYcsh55wvSsMppJfYqKmcgiX4ZjQDcTH02SETYxoT5ZQeXqREfrZMz6az33IwsSX04MRUqNhZ_EpEOeCqvvNQGDr6b0EZWr94J-o_ISOi_A5mpbM/s320/pcb-rnd-pcb-as-virtual-filesystem-in-emacs-file-browser-and-midnight-commander.png" width="320" /></a></div>
<br />
<br />
Enough said! Down to business!<br />
<br />
The first thing is to have a computer running some form of *nix. <a href="http://repo.hu/projects/pcb-rnd/">pcb-rnd</a> will build on most systems, and supports motif, gtk and headless CLI operation. Importantly, for fuse filesystem export, you will need to be running a version of GNU/Linux with fuse support.<br />
<br />
The next thing is to checkout svn head of <a href="http://repo.hu/projects/pcb-rnd/">pcb-rnd</a><br />
<br />
This can be done from a terminal with<br />
<br />
svn checkout svn://repo.hu/pcb-rnd/trunk <br />
<br />
if you do not have subversion (svn) installed, and you are on a debian/ubuntu based system, you can use the following command first to install svn<br />
<br />
sudo apt-get install svn<br />
<br />
you should also install midnight commander, and the fuse development libraries which support userspace filesystems<br />
<br />
sudo apt-get install mc libfuse-dev<br />
<br />
once you have checked out pcb-rnd, do the following<br />
<br />
cd pcb-rnd/trunk<br />
./configure --buildin-export_vfs_fuse --buildin-export_vfs_mc<br />
<br />
during configuration, you should see amidst the output, something like<br />
<br />
FUSE VFS server yes, buildin [export_vfs_fuse]<br />
GNU mc VFS server yes, buildin [export_vfs_mc]<br />
<br />
if ./configure is successful, and dependencies are met, you can proceed to build with the following command<br />
<br />
make<br />
<br />
once built, you can try out the build, with<br />
<br />
cd src<br />
./pcb-rnd <br />
<br />
The Fuse filesystem allows users to create their own filesystems in userspace. Most modern GNU/Linux distributions will have kernel support for fuse. If you have kernel support for fuse, you can now test fuse filesystem export.<br />
<br />
Make a temporary mount point somewhere<br />
<br />
mkdir /tmp/pcb-mnt<br />
<br />
then mount your pcb onto the mount point!<br />
<br />
./pcb-rnd -x vfs_fuse ~/foxhunt-attenuator/fox-attenuator-v1.lht /tmp/pcb-mnt<br />
<br />
and now, you can go ahead and explore your pcb data<br />
<br />
cd /tmp/pcb-mnt<br />
ls<br />
<br />
etc...<br />
<br />
Of course, a file browser, a web browser, Emacs or midnight commander are much easier ways to explore the mounted fuse filesystem than using the CLI.<br />
<br />
pcb-rnd can also load Eagle binary, Eagle XML and KiCad layouts, Protel Autotrax and respective footprints allowing similar inspection of metadata once loaded into pcb-rnd's data model.<br />
<br />
If you do not have fuse support, then you can still play along with midnight commander. To inspect a board's metadata in midnight commander without using fuse, the following configuration files need to be set up.<br />
<br />
Install the file<br />
<br />
pcb-rnd/trunk/src_plugins/export_vfs_mc/upcb<br />
<br />
in /usr/lib/mc/extfs.d<br />
<br />
i.e. with the command<br />
<br />
sudo cp pcb-rnd/trunk/src_plugins/export_vfs_mc/upcb /usr/lib/mc/extfs.d<br />
<br />
Then add the following in mc.ext (which is usually found in /etc/mc/mc.ext) just above the final # Default section in mc.ext:<br />
<br />
# PCB files<br />
shell/.pcb<br />
Open=%cd %p/upcb://<br />
<br />
the above code determines which file endings are treated as mountable by midnight commander. In the example above, it is set to ".pcb"<br />
<br />
The one remaining thing to do is to install the built version of pcb-rnd, so that midnight commander can launch it when required. You can do this from the pcb-rnd/trunk directory with the following command<br />
<br />
sudo make install<br />
<br />
On starting midnight commander, pcb layouts with matching file-endings will be automatically mounted, allowing the metadata to be traversed within the file browser.<br />
<br />
Motivation:<br />
<br />
Apart from the obvious motivation to impress your friends, coworkers and spouse, there are some very simple, slightly impractical, and arguably silly, <a href="http://repo.hu/cgi-bin/pool.cgi?cmd=show&node=vfs_examples">script</a> examples that demonstrate the power of this new capability, and how easy it is to access board metadata via a virtual filesystem.Erichhttp://www.blogger.com/profile/06713492721272257911noreply@blogger.com1tag:blogger.com,1999:blog-3244641027778699849.post-43754003202982731582019-03-30T18:03:00.000-07:002019-03-30T18:09:11.823-07:00Converting gerber to pcb layouts - improvements to translate2coralEDA After getting around to long needed refactoring of <a href="https://github.com/erichVK5/translate2geda">translate2geda</a>, the work in progress result is <a href="https://github.com/erichVK5/translate2coralEDA">translate2coralEDA</a>, which has cleaned up the code, as well as adding support for features that are not possible in either gEDA PCB or KiCad.<br />
<br />
The code will be back-ported to <a href="https://github.com/erichVK5/translate2geda">translate2geda</a>, with exported elements subject to the limitations of the gEDA PCB footprint format which will be the default for <a href="https://github.com/erichVK5/translate2geda">translate2geda</a>.<br />
<br />
The default export format for <a href="https://github.com/erichVK5/translate2coralEDA">translate2coralEDA</a> is <a href="http://repo.hu/projects/pcb-rnd/">pcb-rnd</a> (.lht), which supports padstacks, polygonal copper pad shapes, as well as arcs on copper within footprints, which are called subcircuits in <a href="http://repo.hu/projects/pcb-rnd/">pcb-rnd</a>.<br />
<br />
Perhaps the best example of the support for new features in the data model is the improved gerber importing code, which can create pads from arbitrary polygonal shapes - subject to sanity checks on size and geometry - and import copper arcs as copper features rather than pads, within footprints (subcircuits).<br />
<br />
Here is an example of the top copper layer from a recently designed Raspberry Pi WSPR shield for the 2m band, converted by <a href="https://github.com/erichVK5/translate2coralEDA">translate2coralEDA</a> from the top copper layer gerber into a footprint (.a.k.a. .lht subcircuit) which has then been loaded into <a href="http://repo.hu/projects/pcb-rnd/">pcb-rnd</a><br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhjDVa7w4hMc_gwC1hwwxOENy5iaKmi9gcv1_gJUxHnEVPz6Xa_64NkKYxFdxd8sE-x68O1JcQt0paJEeEwDndpXs_1if1pIikw8QenPgeA44IbCme2tod-ipH1cw9JWfVpIIL-FdBjvl1U/s1600/gerber-import.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhjDVa7w4hMc_gwC1hwwxOENy5iaKmi9gcv1_gJUxHnEVPz6Xa_64NkKYxFdxd8sE-x68O1JcQt0paJEeEwDndpXs_1if1pIikw8QenPgeA44IbCme2tod-ipH1cw9JWfVpIIL-FdBjvl1U/s320/gerber-import.png" width="320" /></a></div>
<br />
<br />
<br />
<br />
Gerber import is subject to a number of caveats, namely, the data in a gerber file lacks logical grouping, and heuristics are used to try and identify pad or pin features. These heuristics will occasionally be fooled by islands of copper pour that are about the right size to be a pad or pin. These can easily be converted back into polygonal copper features within <a href="http://repo.hu/projects/pcb-rnd/">pcb-rnd</a> however.<br />
<br />
The most important caveat is that some EDA tools, like Eagle, paint the features with a raster of thin horizontal lines delineated by similar lines forming borders of copper shapes, making techniques such as this far less practical.<br />
<br />
Accordingly, gerber conversion is a last resort and is really only for those keen to salvage design data, extract features, i.e. exotic footprints, or modify reference implementations for which only gerbers have been provided.<br />
<br />
<a href="http://repo.hu/projects/pcb-rnd/">pcb-rnd</a> can export to KiCad, Protel Autotrax and gEDA PCB formats, subject to the limitations of their respective data models.<br />
<br />
For those wondering, the spiral inductor footprints were created with the <a href="https://github.com/erichVK5/SpiralInductorFootprintGenerator">SpiralInductorFootprintGenerator</a> utility, also available on github.Erichhttp://www.blogger.com/profile/06713492721272257911noreply@blogger.com1tag:blogger.com,1999:blog-3244641027778699849.post-31890316540967254522017-12-28T05:43:00.000-08:002017-12-28T07:41:35.379-08:00Building footprints with oblong shaped pins (as padstacks) using the shape generator in pcb-rndThe new padstack support in pcb-rnd supports arbitrary copper shapes and will replace the roles of distinct pin, pad, hole and via features.<br />
<br />
To
allow users to edit these shapes for custom padstack copper features, a
new copper shape tool can be invoked with the :shape() command.<br />
<br />
As
a worked example, a footprint for a B7G thermionic valve, a.k.a. tube,
will be produced from scratch, using the following device data:<br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhgs1n62bFqMj5X0FCWON8hgxJwxvKqOQNZCt5iVwz_NvwbaESvgkeWoXaDfy_5JC4qgZKWbsFt2LBrMHVsGuwWdDsoZq975XlNmvBGOvCVoX8JEvjWbtj3dy710EiwgEYp3KhgursWzU6u/s1600/B7G-small-button-miniature-7-pin-base-diag9.gif" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="1600" data-original-width="1140" height="320" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhgs1n62bFqMj5X0FCWON8hgxJwxvKqOQNZCt5iVwz_NvwbaESvgkeWoXaDfy_5JC4qgZKWbsFt2LBrMHVsGuwWdDsoZq975XlNmvBGOvCVoX8JEvjWbtj3dy710EiwgEYp3KhgursWzU6u/s320/B7G-small-button-miniature-7-pin-base-diag9.gif" width="228" /></a></div>
<br />
We
begin by creating a hole for the centre of the footprint. We do this by
selecting the via tool and placing a via at a suitable location in a
new layout:<br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiqNpCTi6bksUa6gdtYJhPbR9fwLKY_O5oN-A6vosS3UQ1AigDYIDMez3hp2jWS2Kop7ESdDkTwgeyjgtdWs01t89bQxxdcnbzsb3T7Q27pz1KcfGxo0n0qfKQ9BIn105C5X-dCbXiJK_qC/s1600/01-start-hole-padstack-with-via.png" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiqNpCTi6bksUa6gdtYJhPbR9fwLKY_O5oN-A6vosS3UQ1AigDYIDMez3hp2jWS2Kop7ESdDkTwgeyjgtdWs01t89bQxxdcnbzsb3T7Q27pz1KcfGxo0n0qfKQ9BIn105C5X-dCbXiJK_qC/s320/01-start-hole-padstack-with-via.png" width="320" /></a></div>
<br />
<br />
We place the via at (1000,1000) mil to simplify subsequent calculations:<br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEh9hJbPwTmoA3kLSqjJxYuSgbyZRMYcVC0ILQmtIAdCDoD0UnfTYqI5-rtBNcWYNEwO32zD0pluRKQNtp_nVyp7EYJveQNpuM_xZ0zjv_SSpLFoShu6xs_xOTv8vxSoH12L45cETBjU2JMn/s1600/02-via-placed.png" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEh9hJbPwTmoA3kLSqjJxYuSgbyZRMYcVC0ILQmtIAdCDoD0UnfTYqI5-rtBNcWYNEwO32zD0pluRKQNtp_nVyp7EYJveQNpuM_xZ0zjv_SSpLFoShu6xs_xOTv8vxSoH12L45cETBjU2JMn/s320/02-via-placed.png" width="320" /></a></div>
<br />
We now select the via by clicking on it:<br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjNm3qMjN7THyzQn4oq5adH9WtuSBmlpMFVk9FjObw9GsKjCf1lxfdCw1mKHCo2dif7pUYxVwe4VdRQmBJ2Pq-6R86jYT-LlSd7s678gRYZ_Nq2rEnUVQHYva_sX_iZtVdXqgxtAgYnH2iE/s1600/03-select-via.png" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="746" data-original-width="1366" height="174" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjNm3qMjN7THyzQn4oq5adH9WtuSBmlpMFVk9FjObw9GsKjCf1lxfdCw1mKHCo2dif7pUYxVwe4VdRQmBJ2Pq-6R86jYT-LlSd7s678gRYZ_Nq2rEnUVQHYva_sX_iZtVdXqgxtAgYnH2iE/s320/03-select-via.png" width="320" /></a></div>
<br />
<br />
We now use CTRL-x to cut the via to the buffer<br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhXcrt3L3yEyetBCUHCA3UiiOVE-tBYSXiczTv4pBOpr7o7Wjz2ocAe8c-60_xIdDwSC7Nv8O0kbFiHKJYjQ0oLgPUxSDO5zOAcYmRirTxDcRB5CyiDDmWJGnfWt7jJE1PD9GildPb9L-67/s1600/04-cut-selection-to-buffer.png" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="747" data-original-width="1366" height="174" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhXcrt3L3yEyetBCUHCA3UiiOVE-tBYSXiczTv4pBOpr7o7Wjz2ocAe8c-60_xIdDwSC7Nv8O0kbFiHKJYjQ0oLgPUxSDO5zOAcYmRirTxDcRB5CyiDDmWJGnfWt7jJE1PD9GildPb9L-67/s320/04-cut-selection-to-buffer.png" width="320" /></a></div>
<br />
<br />
We now use the "Convert buffer to padstack" menu item to convert the via to a padstack:<br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiFz-N3-yB8QXlPjeupxtApPCD93zHZlA3RypANN8CqxpgutTAP7LZ8yki2eDpco-TCFYzsrFf5nMlIZGfDVrmmbxM5CAG4oKADKbmjZwVOTT8AydzknMQDQILZ2c-prI3h3HyWMYDEljqW/s1600/05-convert-buffer-to-padstack.png" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="742" data-original-width="1366" height="173" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiFz-N3-yB8QXlPjeupxtApPCD93zHZlA3RypANN8CqxpgutTAP7LZ8yki2eDpco-TCFYzsrFf5nMlIZGfDVrmmbxM5CAG4oKADKbmjZwVOTT8AydzknMQDQILZ2c-prI3h3HyWMYDEljqW/s320/05-convert-buffer-to-padstack.png" width="320" /></a></div>
<br />
<br />
Having done so, we click to place the new padstack on the layout:<br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiK8RmTogxNLM5L-vK7govT8dgV_vcLUwtzn8DDTWLhPLmBDS5tnXGmzezwsz9J3PVAqty631StKnjrzix3zElnMym2cwhDl2KlziUuA3DAahc-X1_t9qunn9SLNSs3poK1Jyxta86pkrv7/s1600/06-place-padstack.png" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiK8RmTogxNLM5L-vK7govT8dgV_vcLUwtzn8DDTWLhPLmBDS5tnXGmzezwsz9J3PVAqty631StKnjrzix3zElnMym2cwhDl2KlziUuA3DAahc-X1_t9qunn9SLNSs3poK1Jyxta86pkrv7/s320/06-place-padstack.png" width="320" /></a></div>
<br />
<br />
We now click on the padstack to select it:<br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgSSY-M4YGceLSs_AOkC8NeP1OVgUaVuRqfLuwDso3hWpfHpm9X_CqRJX-Z837wTEaGRcX8Jah9YoeS0ZEhYAcb2MdbhHDsONonNjUJuP1rsdCyu8plKuY5-2LItJZmbojX_XieBpAii0rk/s1600/07-select-padstack.png" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="746" data-original-width="1366" height="174" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgSSY-M4YGceLSs_AOkC8NeP1OVgUaVuRqfLuwDso3hWpfHpm9X_CqRJX-Z837wTEaGRcX8Jah9YoeS0ZEhYAcb2MdbhHDsONonNjUJuP1rsdCyu8plKuY5-2LItJZmbojX_XieBpAii0rk/s320/07-select-padstack.png" width="320" /></a></div>
<br />
<br />
Having selected the padstack, we can now invoke the padstack editor with the :padstackedit() command:<br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjQ8yzrDDo5kVrXcruw1x71sNjmHNYALZS1cWQTBa5ZM0fu8s0gbCawRGc2pNSDEhMPUxcoB0WwhRFLT0mqOUZEFfttL0IAWuq5TpccVzuWbFAeEk79oIVYQ6vc79eW1EIlxwzIvJ_Kn0eC/s1600/11.1-invoke-padstackedit.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjQ8yzrDDo5kVrXcruw1x71sNjmHNYALZS1cWQTBa5ZM0fu8s0gbCawRGc2pNSDEhMPUxcoB0WwhRFLT0mqOUZEFfttL0IAWuq5TpccVzuWbFAeEk79oIVYQ6vc79eW1EIlxwzIvJ_Kn0eC/s320/11.1-invoke-padstackedit.png" width="320" /></a></div>
<br />
<br />
this produces the following window: <br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgVJcNG_22zH7LAVIdT2CdrYh-AE-mfQVUxhDJ5Hx2rNDbqo3ldjUP1iAPLRazboq8t5e72d9kODhsSEMrvdwtN_ecmexasb5wMSGwYyZUEyOC8xa5G0xFUuEYyTBOqnLaQ4lVy4XKsUPhC/s1600/11.2-select-padstack-prototype-tab.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="745" data-original-width="1366" height="174" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgVJcNG_22zH7LAVIdT2CdrYh-AE-mfQVUxhDJ5Hx2rNDbqo3ldjUP1iAPLRazboq8t5e72d9kODhsSEMrvdwtN_ecmexasb5wMSGwYyZUEyOC8xa5G0xFUuEYyTBOqnLaQ4lVy4XKsUPhC/s320/11.2-select-padstack-prototype-tab.png" width="320" /></a></div>
<br />
<br />
if we click on the prototypes tab, we can inspect and edit the characteristics of the padstack we have just created from the via. We begin by setting the diameter of the hole to 0.222 in, based on the electron tube data sheet. Note that pcb-rnd understands common dimensional
suffixes, like 'mm', 'nm', 'in' or 'mil':<br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEg9_u7ir5a6PhEWr8UsyRbc4zbRXyHXj1BjJ6OLf5T8us_Nsxml88VNOT7MGs9rq7k6l-QIAg9wFG0GQB1swJSrzSGAQi2Eh95a2BTLtKmZSqUnOU4z-tNGOkI7ae4FptxgVQdrsXeo4VSe/s1600/11.3-browse-padstack-copper-shapes-and-change-them.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="747" data-original-width="1366" height="174" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEg9_u7ir5a6PhEWr8UsyRbc4zbRXyHXj1BjJ6OLf5T8us_Nsxml88VNOT7MGs9rq7k6l-QIAg9wFG0GQB1swJSrzSGAQi2Eh95a2BTLtKmZSqUnOU4z-tNGOkI7ae4FptxgVQdrsXeo4VSe/s320/11.3-browse-padstack-copper-shapes-and-change-them.png" width="320" /></a></div>
<br />
<br />
We also note that there are superfluous copper shapes defined for the top, bottom and inner layers. This is to be expected, given that we made the padstack from a via. We can click on the "change..." button for the top layer copper shape to edit it:<br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiQfmTbjsTq5Ah44Ka2evWI1COVDRAF0flI_EoyG0FMM0iRrDu7JTkSCL6wN9OkiV5ZT7rAoh4-iJR4PkW4_MkvV6D0lLufTFAAs6DEql9gjqy2r0sEJ6ICVscrfuwD8-XS99IiiuimZmVE/s1600/11.4-remove-copper-shape-from-layer.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="768" data-original-width="1366" height="179" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiQfmTbjsTq5Ah44Ka2evWI1COVDRAF0flI_EoyG0FMM0iRrDu7JTkSCL6wN9OkiV5ZT7rAoh4-iJR4PkW4_MkvV6D0lLufTFAAs6DEql9gjqy2r0sEJ6ICVscrfuwD8-XS99IiiuimZmVE/s320/11.4-remove-copper-shape-from-layer.png" width="320" /></a></div>
<br />
<br />
We can delete the copper shape for this layer, and do the same for the other defined copper layer shapes. The final result is a padstack property window showing no copper shapes defined, as required for a simple hole:<br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEizDBFRcVw0CkBPeC918251VCRWX58jRod0iLNKtuff5UCVS1Q7MEL2sx7tPKl5EV-Bbpwf28GEgZm-oI2kodMUoUAsW0zYkpZMXqWxVPR-cb7IJVDNF0l2EBuQUfqtUi5JkIeZYs0PmXmI/s1600/11.5-copper-layer-shapes-all-deleted.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="744" data-original-width="1366" height="174" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEizDBFRcVw0CkBPeC918251VCRWX58jRod0iLNKtuff5UCVS1Q7MEL2sx7tPKl5EV-Bbpwf28GEgZm-oI2kodMUoUAsW0zYkpZMXqWxVPR-cb7IJVDNF0l2EBuQUfqtUi5JkIeZYs0PmXmI/s320/11.5-copper-layer-shapes-all-deleted.png" width="320" /></a></div>
<br />
<br />
Having sorted out the central hole for the footprint, we now use the via tool to place a new via that is to become the padstack used for the pins of the B7G tube.<br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhELVXmdmsf-wDHtyegd8iF49doj1FGTSmD0Lrt3CiPieHA5noZsrYQUIveQGs2KfE19JLdBEtzzc2ju4sKfiqYY003O-HX4x66qZqW65gapvWZDdb38mX-f1niDR7lwSSiaL-d6LbcEXVl/s1600/12-place-via-for-first-padstack.png" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhELVXmdmsf-wDHtyegd8iF49doj1FGTSmD0Lrt3CiPieHA5noZsrYQUIveQGs2KfE19JLdBEtzzc2ju4sKfiqYY003O-HX4x66qZqW65gapvWZDdb38mX-f1niDR7lwSSiaL-d6LbcEXVl/s320/12-place-via-for-first-padstack.png" width="320" /></a></div>
<br />
<br />
Having done so, we select the via and with the top layer selected, we type ':shape()' to invoke the copper polygon shape tool...<br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEi2T3EtjDRAcLZTlArIkywxUtOCbXREJZcO9IquEj-6x77qrzGETn1fjBlIYTAwdfO04puUV9WDsFhL7ilNO_wQlocRowyRHLP_VlmWcIwk7z5Ow03JVIP-3bgKPRakqGu1SbLf09AtbqqF/s1600/13-invoke-shape%2528%2529-command.png" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEi2T3EtjDRAcLZTlArIkywxUtOCbXREJZcO9IquEj-6x77qrzGETn1fjBlIYTAwdfO04puUV9WDsFhL7ilNO_wQlocRowyRHLP_VlmWcIwk7z5Ow03JVIP-3bgKPRakqGu1SbLf09AtbqqF/s320/13-invoke-shape%2528%2529-command.png" width="320" /></a></div>
<br />
<br />
which
brings up the following window, allowing us to create a polygon that
will become a pad for the padstack. We begin by editing the horizontal
and vertical dimensions:<br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
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<br />
<br />
We
then choose a more rounded pad shape, by increasing the number of
corners to 10. Note that the shape() dialogue also supports the creation
of round, rounded corner rectangle ("roundrect") and rectangular pads.
Polygonal pads were chosen for this particular footprint because of the
radial spacing and symmetry of the pins on the tube:<br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
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<br />
<br />
Having done this, we use the shape() tool to create another pad for our padstack on the bottom copper layer:<br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
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<br />
<br />
Having added to polygonal pads centred on our via, we use the selection tool to select the three features<br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiMe6KUfBLBzrNYduwbPwnPZvGKY1Lq4TDlkvfB34EnRD50VaQVUAzu0GOE4uDpcE68rMCXbvbvv3wykielsvTaJgl1qFYd-qcLqm5XMYvyv9FYYh0CThiTbSSChee0yB130wMQsHVmk-BD/s1600/17-select-pads-and-via.png" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiMe6KUfBLBzrNYduwbPwnPZvGKY1Lq4TDlkvfB34EnRD50VaQVUAzu0GOE4uDpcE68rMCXbvbvv3wykielsvTaJgl1qFYd-qcLqm5XMYvyv9FYYh0CThiTbSSChee0yB130wMQsHVmk-BD/s320/17-select-pads-and-via.png" width="320" /></a></div>
<br />
<br />
which we then cut to the buffer with CTRL-x <br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEglFcNum5VUuN3TG6Kso-UlFrcGMFCVo3VEI0-ibVuWWLdmZwo3UcDQgdRu_or-Wl2_tvkDDf_gYq7RhCzeyNYPBFLXX_ANtfRMOH8nJI0LvdXVCtealKQiQZNuKvEgAvb4draqPq4QSvp9/s1600/18-cut-selection-to-buffer.png" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEglFcNum5VUuN3TG6Kso-UlFrcGMFCVo3VEI0-ibVuWWLdmZwo3UcDQgdRu_or-Wl2_tvkDDf_gYq7RhCzeyNYPBFLXX_ANtfRMOH8nJI0LvdXVCtealKQiQZNuKvEgAvb4draqPq4QSvp9/s320/18-cut-selection-to-buffer.png" width="320" /></a></div>
<br />
<br />
and proceed to convert to a padstack with the "Convert buffer to padstack" menu item:<br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhkfe4qxro4p1i_-LLVIAZuyOP1gYkf357KZHRRN8hoR7IJcsJ3RegoqZFkPpsIhWM2aamMaIpX8ye3lYZlR3sSRnXF8SlIYY7Qc9Kc65uB9yaurm7Z2ssoYj01nfmWBfVsrMycNo1J-To-/s1600/19-convert-to-padstack.png" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhkfe4qxro4p1i_-LLVIAZuyOP1gYkf357KZHRRN8hoR7IJcsJ3RegoqZFkPpsIhWM2aamMaIpX8ye3lYZlR3sSRnXF8SlIYY7Qc9Kc65uB9yaurm7Z2ssoYj01nfmWBfVsrMycNo1J-To-/s320/19-convert-to-padstack.png" width="320" /></a></div>
<br />
<br />
We now place the padstack in an intended location, based on the datasheet for the tube: <br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjXZXFLajObePjDBaUDNEEG04tuome2We86pfmkZnl-8YujJD-sV4dIQ4yIeDYtzqWsAeKOqhe05Op0dlRojEg5eNswpIqCXUdjitjQGtQ4gvG67XEW_fVttpBS1NudEcyawGRzaLg8t5AI/s1600/20-place-new-padstack.png" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjXZXFLajObePjDBaUDNEEG04tuome2We86pfmkZnl-8YujJD-sV4dIQ4yIeDYtzqWsAeKOqhe05Op0dlRojEg5eNswpIqCXUdjitjQGtQ4gvG67XEW_fVttpBS1NudEcyawGRzaLg8t5AI/s320/20-place-new-padstack.png" width="320" /></a></div>
<br />
<br />
We continue pasting the padstack from the buffer in the remaining pin locations, based on the dimensions from the data sheet:<br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhQY1PcfOAUanSPyr2Ik_N3RvI7cfw3fILyRXFAhjV4gs6zeVVR1Spc7DlNV5IYUgUv2u9Oa39X2HveC8-XeTs9V7tzHVanHH65Zd7RZCrhPqvQYIt7rMKEPJKHerntU3B1WJ-CxSCv5U9i/s1600/21-place-2nd-padstack-from-buffer.png" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhQY1PcfOAUanSPyr2Ik_N3RvI7cfw3fILyRXFAhjV4gs6zeVVR1Spc7DlNV5IYUgUv2u9Oa39X2HveC8-XeTs9V7tzHVanHH65Zd7RZCrhPqvQYIt7rMKEPJKHerntU3B1WJ-CxSCv5U9i/s320/21-place-2nd-padstack-from-buffer.png" width="320" /></a></div>
<br />
<br />
We place the easy 90 degree spaced pin padstacks first:<br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiWmGR7kW3RIFyBiQjt45hFdCEPmEqyoVWywwJx4Ebv_fmA0Wa0gTlbQOoa8wIoqMCmU8DULSjY4O1s9fbY0q8mOa4p8AJmAveBoZCbF0TA9diF32BC_-AFskflETavw3KIvN-yxFETA0OQ/s1600/22-place-subsequent-padstacks.png" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="747" data-original-width="1366" height="174" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiWmGR7kW3RIFyBiQjt45hFdCEPmEqyoVWywwJx4Ebv_fmA0Wa0gTlbQOoa8wIoqMCmU8DULSjY4O1s9fbY0q8mOa4p8AJmAveBoZCbF0TA9diF32BC_-AFskflETavw3KIvN-yxFETA0OQ/s320/22-place-subsequent-padstacks.png" width="320" /></a></div>
<br />
<br />
And then do a bit of trigonometry to calculate the positions of the remaining pins and place padstacks in these locations too: <br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiL_yJZbxN98v5vNY3H_WBqUmFu2eaCGLSktM8MBpqeqCcgYr4pvXTTISQO4XKjhcVkhw6n2NgRdeBETbwJexCTrsyqYisd0dVAT9ovE44a0Tu7VY5JfIfmYdLdRnXA1IvLtZms7sOs0djL/s1600/23-add-further-padstacks.png" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiL_yJZbxN98v5vNY3H_WBqUmFu2eaCGLSktM8MBpqeqCcgYr4pvXTTISQO4XKjhcVkhw6n2NgRdeBETbwJexCTrsyqYisd0dVAT9ovE44a0Tu7VY5JfIfmYdLdRnXA1IvLtZms7sOs0djL/s320/23-add-further-padstacks.png" width="320" /></a></div>
<br />
<br />
Having positioned the padstack in the necessary locations, we review the work thus far: <br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEj_XcPT_p3mWeSjq-qIWfN7yyYaNn9gRvL9bXiYQV9so8yrMkkd20-GHP_iDk2V_W5UvXPSYLmr0y2Fnma45ve4l6bS1C9izyhYTyX7scnfT-Jzkos1uJ1c7YnLiz40ycuVSo9NFpYLDXwT/s1600/24-complete-initial-placement-of-padstacks.png" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEj_XcPT_p3mWeSjq-qIWfN7yyYaNn9gRvL9bXiYQV9so8yrMkkd20-GHP_iDk2V_W5UvXPSYLmr0y2Fnma45ve4l6bS1C9izyhYTyX7scnfT-Jzkos1uJ1c7YnLiz40ycuVSo9NFpYLDXwT/s320/24-complete-initial-placement-of-padstacks.png" width="320" /></a></div>
<br />
<br />
Our
next job is to rotate the various padstacks as necessary. We do this by
selecting each padstack in turn, using CTRL-e to invoke the property
editor, and altering the rotation value as required. Applying -45
subtracts 45 degrees from the current value:<br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjWhVle2XXiig86ExivV6EHB7k99YPaWd0V0nMa8dP4G5BskP__MEc3XqF6yxVFR3ClVmthpNf-2B3uZo5NCvfrnUM0TRHFhPZOFPjOXeQw8RBdSLlfRK9BTtOH-xVeNGu92f9reYCNWvY9/s1600/25-rotate-a-padstack.png" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="743" data-original-width="1366" height="174" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjWhVle2XXiig86ExivV6EHB7k99YPaWd0V0nMa8dP4G5BskP__MEc3XqF6yxVFR3ClVmthpNf-2B3uZo5NCvfrnUM0TRHFhPZOFPjOXeQw8RBdSLlfRK9BTtOH-xVeNGu92f9reYCNWvY9/s320/25-rotate-a-padstack.png" width="320" /></a></div>
<br />
<br />
Similarly, applying 45 to the rotation, adds 45 to the rotation value: <br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhvmoKQfz17F8YYgrOYr0GczPkT-ubDv_uzKlkP-uLadC2UFldPzkzGTKZb1h9Yq6VgWJJ8YJBDYxZe2gXpeo4uNJ5kB7OBR67tacVla8iE25zL16AJzEr2jeAdWFHGB9KwXipyAuyl2Jzp/s1600/26-rotate-another-padstack.png" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="741" data-original-width="1366" height="173" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhvmoKQfz17F8YYgrOYr0GczPkT-ubDv_uzKlkP-uLadC2UFldPzkzGTKZb1h9Yq6VgWJJ8YJBDYxZe2gXpeo4uNJ5kB7OBR67tacVla8iE25zL16AJzEr2jeAdWFHGB9KwXipyAuyl2Jzp/s320/26-rotate-another-padstack.png" width="320" /></a></div>
<br />
<br />
Likewise, additional rotation of 90 is applied to the top pin:<br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiYtb2Z91ZhI29zOfog1HVx-W4Rdwn3gqmVX_q557fMMdkbmE1OdYSZMl3XScIhQmyT2iqCxuUGglsd2A824Vu-2G1HO8ReOdsozRcK_se1TlNaTsdyEeYcGL-XyUiztKGZxfth8OaoD4D9/s1600/27-rotate-another-padstack.png" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="744" data-original-width="1366" height="174" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiYtb2Z91ZhI29zOfog1HVx-W4Rdwn3gqmVX_q557fMMdkbmE1OdYSZMl3XScIhQmyT2iqCxuUGglsd2A824Vu-2G1HO8ReOdsozRcK_se1TlNaTsdyEeYcGL-XyUiztKGZxfth8OaoD4D9/s320/27-rotate-another-padstack.png" width="320" /></a></div>
<br />
<br />
almost done, we add 45 degrees rotation to the bottom left pin:<br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEi3yEJ1xMfVZUyy9wYWntr1VVJnxJTc6tAwMl_t9CswsN5__c6DKMz6gLTFAVXLZ2HKshiB234z3pXv2OPCqkM0Tzxds972q6W4xVJWD1-Bp4RbJRL5jwZQSHNW5JP9Pp9OJeVEwcE7ZURt/s1600/28-rotate-yet-another-padstack.png" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="744" data-original-width="1366" height="174" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEi3yEJ1xMfVZUyy9wYWntr1VVJnxJTc6tAwMl_t9CswsN5__c6DKMz6gLTFAVXLZ2HKshiB234z3pXv2OPCqkM0Tzxds972q6W4xVJWD1-Bp4RbJRL5jwZQSHNW5JP9Pp9OJeVEwcE7ZURt/s320/28-rotate-yet-another-padstack.png" width="320" /></a></div>
<br />
<br />
and we finish by subtracting 45 degrees rotation from the bottom right pin: <br />
<br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgxUWctcN6B0y1KzPk2lryKz3xPeH52S-8fqu2zPWZ0AUqpPvpVEIYqZtzyxHcId0IHf1YbKuzzAkNutSUvgyGIxiFcooS2a8PlCSuEeyh4U2HmhtwAMrxfyq-35fBT4Vq2wFoeuUqyi7oP/s1600/29-rotate-last-padstack.png" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="746" data-original-width="1366" height="174" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgxUWctcN6B0y1KzPk2lryKz3xPeH52S-8fqu2zPWZ0AUqpPvpVEIYqZtzyxHcId0IHf1YbKuzzAkNutSUvgyGIxiFcooS2a8PlCSuEeyh4U2HmhtwAMrxfyq-35fBT4Vq2wFoeuUqyi7oP/s320/29-rotate-last-padstack.png" width="320" /></a></div>
<br />
<br />
We now select the arc tool....<br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhKoYBO18-AOjC8G6WOLwnKf2_S8JL-jr6Fw-ycx7tklSdaqbAgVD4YeC9JlNGTlFnKThpj_YRlp5Cjd7KNASs3sf93K4MMQbRBm45eRimd2JjD5Lqkh4pJ-P8nWMGsKErcboACwozd81F7/s1600/30-select-arc-tool.png" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhKoYBO18-AOjC8G6WOLwnKf2_S8JL-jr6Fw-ycx7tklSdaqbAgVD4YeC9JlNGTlFnKThpj_YRlp5Cjd7KNASs3sf93K4MMQbRBm45eRimd2JjD5Lqkh4pJ-P8nWMGsKErcboACwozd81F7/s320/30-select-arc-tool.png" width="320" /></a></div>
<br />
<br />
And now select the top silk layer to draw an arc to denote the outline of the tube, based on the datasheet:<br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgKh-p-85mZT94Vof0G7G1SqXg40rI4DTpHwUc8nlHOubwYQDCIu3CpES4BF9aWPHdQ7DTEqXaVVtelKQglNDcZp8RcngM9fdDEZc5Pt7_yHDIyC2SzAdqCab58BxbqZmLWecm-h0xQrKkf/s1600/31-select-top-silk-layer.png" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgKh-p-85mZT94Vof0G7G1SqXg40rI4DTpHwUc8nlHOubwYQDCIu3CpES4BF9aWPHdQ7DTEqXaVVtelKQglNDcZp8RcngM9fdDEZc5Pt7_yHDIyC2SzAdqCab58BxbqZmLWecm-h0xQrKkf/s320/31-select-top-silk-layer.png" width="320" /></a></div>
<br />
<br />
A simple way to do this is to draw a 90 degree arc as follows:<br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiVzRTuUmvqy1zRS2D1PVsevm0xNJnHryop5jhtimrxqZlFbdXADm3xtGNFiR7O8Yx-QLKVi5RkSb41YKgQav2RRh2g4rJ677RxdSqHE3fPkr0kq6-CP_yO9ELLBtNMfZ3Q3GEigds-kHym/s1600/32-start-arc.png" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiVzRTuUmvqy1zRS2D1PVsevm0xNJnHryop5jhtimrxqZlFbdXADm3xtGNFiR7O8Yx-QLKVi5RkSb41YKgQav2RRh2g4rJ677RxdSqHE3fPkr0kq6-CP_yO9ELLBtNMfZ3Q3GEigds-kHym/s320/32-start-arc.png" width="320" /></a></div>
<br />
after
this, select the arc and invoke the property editor with CTRL-e to
define the desired value for delta, to create a circle. The other way to
do this is to simply click on the end of the arc and then drag the end
of the arc around until a circle is formed.<br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhOx9SR-oRXmvv_PruRmvjxGXx5NTRwYEsG67kTLGrA1y9Jc0uE5KV9H5cEBHy8ciYf3ThIut1bDXGhXKx75-hzTXsnACdrx8TZbB-eq8YrXpM5C-aRTJZu7aoCPpGzdc0ct_aYXJMl_pFv/s1600/33-turn-arc-into-circle.png" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="744" data-original-width="1366" height="174" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhOx9SR-oRXmvv_PruRmvjxGXx5NTRwYEsG67kTLGrA1y9Jc0uE5KV9H5cEBHy8ciYf3ThIut1bDXGhXKx75-hzTXsnACdrx8TZbB-eq8YrXpM5C-aRTJZu7aoCPpGzdc0ct_aYXJMl_pFv/s320/33-turn-arc-into-circle.png" width="320" /></a></div>
<br />
<br />
The text tool is now used to add a text label to the footprint.<br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjr20zj-QmEZRNnb0VRcGQkHrOlIqwQ2zrK3lUUZMOQcibv7msUKjRYQBDS8O_SbnGpS5k4OaXri4saA-V9_tBwFoqfsPpEc4F-Q4pQrIoqqINMXMR740wd5QjorC1p3lfP99T4so5EYZh9/s1600/34-add-text-label-to-footprint.png" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjr20zj-QmEZRNnb0VRcGQkHrOlIqwQ2zrK3lUUZMOQcibv7msUKjRYQBDS8O_SbnGpS5k4OaXri4saA-V9_tBwFoqfsPpEc4F-Q4pQrIoqqINMXMR740wd5QjorC1p3lfP99T4so5EYZh9/s320/34-add-text-label-to-footprint.png" width="320" /></a></div>
<br />
<br />
Having completed the components required for the thermionic valve, the set of features is selected: <br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEi95o2FRgxr1-mJ-pgIrRkc0U9cuaN9o5u858Dw6pOzCGkK4-8xhpsRgwOv5fqxK32nCZ1VOMBbEfWLIbs2z2Sdui4fbiSLM0918wgIIQTNfzbYgVyjv3GI7xsp8XLfRcVHe0SD3m1dZ3EG/s1600/35-select-all.png" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEi95o2FRgxr1-mJ-pgIrRkc0U9cuaN9o5u858Dw6pOzCGkK4-8xhpsRgwOv5fqxK32nCZ1VOMBbEfWLIbs2z2Sdui4fbiSLM0918wgIIQTNfzbYgVyjv3GI7xsp8XLfRcVHe0SD3m1dZ3EG/s320/35-select-all.png" width="320" /></a></div>
<br />
<br />
and CTRL-x is then used to cut the selection to the buffer. It is important to note that the location of the mouse when CTRL-x is used determines the origin of the resulting footprint. In this case, the cursor is snapped to the central hole before using CTRL-x, to give a footprint origin centred on the hole:<br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhzssxu2mgiqZGGBwP-JQDQOr4-nkRHnb1Q2lxWVaU78MVRCHqQp2aQGxSJZoaxnsmQtJCpecKest2yaxpfRs_jOZo_b3vDQA5lHek5-tYaKl9twH_j-LowhQoSoWTtriQySt75UxZarmZk/s1600/36-cut-selection-to-buffer.png" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhzssxu2mgiqZGGBwP-JQDQOr4-nkRHnb1Q2lxWVaU78MVRCHqQp2aQGxSJZoaxnsmQtJCpecKest2yaxpfRs_jOZo_b3vDQA5lHek5-tYaKl9twH_j-LowhQoSoWTtriQySt75UxZarmZk/s320/36-cut-selection-to-buffer.png" width="320" /></a></div>
<br />
<br />
With the features now cut to the buffer, we can convert the buffer contents to a subcircuit with the menu item "Convert buffer to subcircuit":<br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjaghNsaHwJij9whM0JOocjAmFlLSpoOQ1HK7IuyV72-OdfPxgzNCHhuDIo5Jhd0reBJVQzZGMe_M43VTBKSNNRZfOwdopcLM6Jdt0zXwciK41166iMsL2xjUP-TlyuDnlCO8ZVdJybwevj/s1600/37-convert-buffer-to-subcircuit.png" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="746" data-original-width="1366" height="174" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjaghNsaHwJij9whM0JOocjAmFlLSpoOQ1HK7IuyV72-OdfPxgzNCHhuDIo5Jhd0reBJVQzZGMe_M43VTBKSNNRZfOwdopcLM6Jdt0zXwciK41166iMsL2xjUP-TlyuDnlCO8ZVdJybwevj/s320/37-convert-buffer-to-subcircuit.png" width="320" /></a></div>
<br />
<br />
We now see the red, thin dashed line surrounding our new footprint, labeled 'U0':<br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgubH4oL4_YzOM0trgKiMZWwpQTus66liOVJCOrAqWnZWxQ1T_jqrotd-ZG9GLCf6ErXabnackHt2nbT2X-wzCwusyt363Zq3bICdcovjvsdiBahlJEievGpM_0AKpRCqs8yCOJOlC0exb9/s1600/38-new-subcircuit-element.png" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgubH4oL4_YzOM0trgKiMZWwpQTus66liOVJCOrAqWnZWxQ1T_jqrotd-ZG9GLCf6ErXabnackHt2nbT2X-wzCwusyt363Zq3bICdcovjvsdiBahlJEievGpM_0AKpRCqs8yCOJOlC0exb9/s320/38-new-subcircuit-element.png" width="320" /></a></div>
<br />
<br />
All
that remains is to number the terminals of the footprint. This is done
by hovering over a terminal, and typing 'n', which brings up a window
allowing a label to be specified. Each of the pins is numbered this way.<br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhu6JpXWDTXM2_DOM_9IhUUIJLFSOxDIp301SK7ce6OWZNGh31C-3Cn8Kcy5ceg72zSQ8GuiVD5SjG63nYgkhyphenhyphen1eIOzxc_oDQucDSMhmzdKt-Ja2_vFdzf8Im1pFII-iZSwOkxRnzgrF4NQ/s1600/39-number-terminals-of-new-subcircuit.png" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="743" data-original-width="1366" height="174" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhu6JpXWDTXM2_DOM_9IhUUIJLFSOxDIp301SK7ce6OWZNGh31C-3Cn8Kcy5ceg72zSQ8GuiVD5SjG63nYgkhyphenhyphen1eIOzxc_oDQucDSMhmzdKt-Ja2_vFdzf8Im1pFII-iZSwOkxRnzgrF4NQ/s320/39-number-terminals-of-new-subcircuit.png" width="320" /></a></div>
<br />
<br />
The numbering can be checked afterwards by hovering over each pin in turn, and noting its properties: <br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiGN3dC_bD-VK3pc9HHfUKhaLjn4p9e7lC6KaEEdqMC3gewIt-6FCOCjcfHA28wIMD4WrUH5RmTEbGinXPjP5GZBlsNbXHL8CJDMG5PExAWWwGpE09xyjhxtimLKppFf5laJl3QQVjP5EK2/s1600/40-terminals-all-numbered.png" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiGN3dC_bD-VK3pc9HHfUKhaLjn4p9e7lC6KaEEdqMC3gewIt-6FCOCjcfHA28wIMD4WrUH5RmTEbGinXPjP5GZBlsNbXHL8CJDMG5PExAWWwGpE09xyjhxtimLKppFf5laJl3QQVjP5EK2/s320/40-terminals-all-numbered.png" width="320" /></a></div>
<br />
<br />
We now inspect the completed footprint from the top <br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjQUb5Ye_qjRMuYR7ojWB4N1_O4P5iuaCZTkCWNdvysJWWuA4rKsmtuUdOU96nEedOODnghbpJlXRBvhZOUUJPIXEMZ6LB2YzBJGQHRbplvjVnYgzfIH7ZUU3X8DvO8Vv6Q0ozxXFhdlFL9/s1600/41-completed-subcircuit.png" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjQUb5Ye_qjRMuYR7ojWB4N1_O4P5iuaCZTkCWNdvysJWWuA4rKsmtuUdOU96nEedOODnghbpJlXRBvhZOUUJPIXEMZ6LB2YzBJGQHRbplvjVnYgzfIH7ZUU3X8DvO8Vv6Q0ozxXFhdlFL9/s320/41-completed-subcircuit.png" width="320" /></a></div>
<br />
<br />
We inspect it from below, by hovering over the centre of the footprint and using SHIFT-Tab to flip the board <br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiqiZul5AraU7xD_JOIzPv3pzEzygr1lBTUoBrtboW6RHsRjdde_5S4MK7MVviakBEq5hKvxBq4UVUWAjOaAG7huEPw4-L9JG-o_NyvsH9ROqVHCVfVEfxK55eJpWxwAlXLO0Xp_owLPg-0/s1600/42-completed-subcircuit-rear-view.png" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiqiZul5AraU7xD_JOIzPv3pzEzygr1lBTUoBrtboW6RHsRjdde_5S4MK7MVviakBEq5hKvxBq4UVUWAjOaAG7huEPw4-L9JG-o_NyvsH9ROqVHCVfVEfxK55eJpWxwAlXLO0Xp_owLPg-0/s320/42-completed-subcircuit-rear-view.png" width="320" /></a></div>
<br />
<br />
We
return to the front view and see the effect of turning off
'Subcircuits' visibility, which toggles the display of the dashed thin
red outlines of subcircuits<br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjKqYqyeaBqAUneRwXZvL6JMzbDRMrzmn_0GjFvInWfqk-V8U_ZlmLcjBw3Ig5feH8_sH76QoSWRJXyC3n4Rl9ytcVDc53Yva_zIcm50EG32jpT6A2A5-bhMZZbxzcS4dcauukPBVWNiYQ_/s1600/43-hidden-subcircuit-outlines.png" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjKqYqyeaBqAUneRwXZvL6JMzbDRMrzmn_0GjFvInWfqk-V8U_ZlmLcjBw3Ig5feH8_sH76QoSWRJXyC3n4Rl9ytcVDc53Yva_zIcm50EG32jpT6A2A5-bhMZZbxzcS4dcauukPBVWNiYQ_/s320/43-hidden-subcircuit-outlines.png" width="320" /></a></div>
<br />
<br />
We also see the effect of turning off
'Padstack marks' visibility, which toggles the display of the red padstack crosshairs<br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgn4Ulqv4p_aov9sVg_LJgp4rfYYz19E4_2_0WzH9SIMsOybvCb_XjMeWdEvC7HKHKs-3hyphenhyphenCBA1HQTyIdOcozPeWGUnb49FrUXRqjxgsiiw7uvoUu1x-AG7n9PMTTP5sLHNi0nJLGRfpTO8/s1600/44-hidden-padstack-marks.png" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgn4Ulqv4p_aov9sVg_LJgp4rfYYz19E4_2_0WzH9SIMsOybvCb_XjMeWdEvC7HKHKs-3hyphenhyphenCBA1HQTyIdOcozPeWGUnb49FrUXRqjxgsiiw7uvoUu1x-AG7n9PMTTP5sLHNi0nJLGRfpTO8/s320/44-hidden-padstack-marks.png" width="320" /></a></div>
<br />
<br />
We now undertake the final task of setting an appropriate solder mask clearance for the padstacks. <br />
We select the footprint:<br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhbp4RwtRQGUqBbphtCw5egcSAYYrarZ4fSfqMNe35HbCTthABJQdrpsLR5-tybzBl7EuzG3iY8_Fy9WBay7m5uZCo6BYSyB50YVrCIQJqcdoUKOwauZ0lACBVhtQeE-1WeuJ33RYmKGQ6x/s1600/45-padstackedit%2528%2529-command.png" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhbp4RwtRQGUqBbphtCw5egcSAYYrarZ4fSfqMNe35HbCTthABJQdrpsLR5-tybzBl7EuzG3iY8_Fy9WBay7m5uZCo6BYSyB50YVrCIQJqcdoUKOwauZ0lACBVhtQeE-1WeuJ33RYmKGQ6x/s320/45-padstackedit%2528%2529-command.png" width="320" /></a></div>
<br />
<br />
We now invoke the padstack editor with :padstackedit() to get the following window:<br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiO9rsYufG1KxkYD4mpQtrgIIAv5Ka9BZ8viFlASQX4CDSPkCaEpVl9dUVkkResNEbeVRPzKK9axH8KczQq5gv9EJyGNR_tkiF6B3dYIfAP2AEwAoBZza1vz6QN4J35KEFiP1wv3QYqFiNO/s1600/46-padstack-prototype-edit-tab.png" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="743" data-original-width="1366" height="174" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiO9rsYufG1KxkYD4mpQtrgIIAv5Ka9BZ8viFlASQX4CDSPkCaEpVl9dUVkkResNEbeVRPzKK9axH8KczQq5gv9EJyGNR_tkiF6B3dYIfAP2AEwAoBZza1vz6QN4J35KEFiP1wv3QYqFiNO/s320/46-padstack-prototype-edit-tab.png" width="320" /></a></div>
<br />
<br />
we click on the prototype tab to view the properties of the padstack upon which all seven pins are based<br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjUL97kPqG5PgIMqHnaG1zdLcIOk67s9Rx1NFO-1U7O77SivQ5s-_mImfaQYSE1klaoK5du7AJqzps66M1AFwQfnkOYg6ysldeZM72o-eFkKfSyzCp_il-yeBM1A75QbN4-ph9nqEbdQcdC/s1600/47-change-mask-setting.png" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="747" data-original-width="1366" height="174" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjUL97kPqG5PgIMqHnaG1zdLcIOk67s9Rx1NFO-1U7O77SivQ5s-_mImfaQYSE1klaoK5du7AJqzps66M1AFwQfnkOYg6ysldeZM72o-eFkKfSyzCp_il-yeBM1A75QbN4-ph9nqEbdQcdC/s320/47-change-mask-setting.png" width="320" /></a></div>
<br />
<br />
In
this window, we see that there are no solder mask properties. We click
on "change..." and automatically generate a mask shape for the top
layer:<br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEh46E0_5YyNNSPpRYIMPGXmwcR5mjclS6GN1ruhQMbEAkxSfbULWhgWDXKK9S-PQTwqpf7N01C7F-7iXCn6fLQxvDkvDqeerjFzVR8E4f0lG7KLiHGe-iZ5aSIpmIlr6_RsC2gApk5EX9Fr/s1600/48-derive-shape-automatically.png" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="746" data-original-width="1366" height="174" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEh46E0_5YyNNSPpRYIMPGXmwcR5mjclS6GN1ruhQMbEAkxSfbULWhgWDXKK9S-PQTwqpf7N01C7F-7iXCn6fLQxvDkvDqeerjFzVR8E4f0lG7KLiHGe-iZ5aSIpmIlr6_RsC2gApk5EX9Fr/s320/48-derive-shape-automatically.png" width="320" /></a></div>
<br />
<br />
We now do the same for the bottom layer mask properties: <br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgPwMoXnKt7ZyGXgzpvY-xz5pdhH-22bAmQAT7mtyX_lm8e8FpJGIbGea2rRYllsiogE0i5o87t5QMUfw7XWmYnObT-oQC2Jn0_4RfvmTGS01wk1d69U_ogoqK211APq9vize-9pQtyHxxX/s1600/49-change-bottom-mask.png" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="743" data-original-width="1366" height="174" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgPwMoXnKt7ZyGXgzpvY-xz5pdhH-22bAmQAT7mtyX_lm8e8FpJGIbGea2rRYllsiogE0i5o87t5QMUfw7XWmYnObT-oQC2Jn0_4RfvmTGS01wk1d69U_ogoqK211APq9vize-9pQtyHxxX/s320/49-change-bottom-mask.png" width="320" /></a></div>
<br />
<br />
and automatically generate a mask opening: <br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgNxp7fkSzAwK51ux5bODfCLQtuaRnnSBOAg7PVUv7ns1cmVXXqJPxOGVa2E9ceghkBDQk-9hNsT1WCt1U7DBOSJlHM_LsD_4-E77ZM-AWB_TjDhCsjlnYO2kStVioBwRRJU2tdCzG8NEAY/s1600/50-copy-shape-from-top-mask.png" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="744" data-original-width="1366" height="174" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgNxp7fkSzAwK51ux5bODfCLQtuaRnnSBOAg7PVUv7ns1cmVXXqJPxOGVa2E9ceghkBDQk-9hNsT1WCt1U7DBOSJlHM_LsD_4-E77ZM-AWB_TjDhCsjlnYO2kStVioBwRRJU2tdCzG8NEAY/s320/50-copy-shape-from-top-mask.png" width="320" /></a></div>
<br />
While
it is open, we also use the padstackedit() window to confirm, or change
if necessary, that the pin holes have 40mil (0.040 in) diameters, as
per the data sheet. Obviously, at this point, individual designers might
opt for larger holes to allow some room for variation in manufactured
pin sizes and PCB manufacturing tolerances.<br />
<br />
<br />
Similarly, if a copper pad shape has been defined for the top layer, the padstackedit() window can be used as a short cut to copy the shape to the bottom layer, eliminating the need for manually creating a bottom layer shape for inclusion in a padstack being created from scratch.<br />
<br />
<br />
We finish by toggling the solder mask layer, and seeing the resulting solder mask clearances: <br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjzWau260JxJxG_h7D8ckONor0otfgtyaUCEjxTPlSl_Np5cnYtR1oimyY0o8YYmkQUNr_krs3SYL2hRvqQrRsuRMWGiXhVY_wIgCNQ-UcRM_Ui7i2N45473vI6JG3tafug7pB84vk8sap-/s1600/51-solder-mask-pullback.png" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjzWau260JxJxG_h7D8ckONor0otfgtyaUCEjxTPlSl_Np5cnYtR1oimyY0o8YYmkQUNr_krs3SYL2hRvqQrRsuRMWGiXhVY_wIgCNQ-UcRM_Ui7i2N45473vI6JG3tafug7pB84vk8sap-/s320/51-solder-mask-pullback.png" width="320" /></a></div>
<br />
<br />
In closing, we note that the preceding example demonstrates multiple new features in pcb-rnd:<br />
<br />
1)
Footprints are now subcircuits, rather than a distinct hardwired
"element" type. This means that a text label or text labels are now
possible within footprints, and also that an arbitrary polygonal pad is
possible on any given layer, rather than the more limited options in the
past of SMD (rectangular), round pins and square through hole pins.<br />
<br />
2) the shape() tool is a quick and easy way to build common padstack copper features.<br />
<br />
3)
we saw how pcb-rnd can use a padstack prototype which can then be
copied and modified as needed within a footprint. In this case, the one
prototype padstack sufficed for all seven pins, the only differences
between them being rotation.<br />
<br />
4) holes are now just a type of padstack, and are no longer a unique or distinct feature type.Erichhttp://www.blogger.com/profile/06713492721272257911noreply@blogger.com7tag:blogger.com,1999:blog-3244641027778699849.post-81594252404143441902017-12-15T09:50:00.001-08:002017-12-17T14:14:28.317-08:00Importing Cadsoft Eagle Binary layouts and libraries into pcb-rndFurther work has gone into pcb-rnd's<br />
<br />
trunk/src_plugins/io_eagle/*<br />
<br />
import/output plugin for Cadsoft Eagle layouts.<br />
<br />
as a result, pcb-rnd can now import:<br />
<br />
<ul>
<li>Eagle XML format layouts (.brd), i.e. version 6 and up, including netlist</li>
<li>Footprints in Eagle XML format libraries (.lib) </li>
<li>Eagle binary format layouts (.brd), i.e. versions 3, 4 and 5, including netlist</li>
<li>Footprints in Eagle binary format libraries (.lib)</li>
</ul>
<br />
With this new capability, existing OSHW designs and user contributed parts libraries can remain in the information commons without being fenced off by new changes to Eagle licensing.<br />
<br />
As an example, here is the <a href="http://members.ozemail.com.au/~jgprice/The%20BC547%2080M%20SSB%20QRP%20Transceiver.html"><span class="st">VK3AJG</span></a> BC547 80m SSB transceiver design, loaded from an Eagle binary format layout (.brd) file made available by <a href="http://www.qsl.net/g4usp/BC547%20HF%20TXCVR/All%20transistor%20BC547%20SSB%20HF%20TXCVR.htm">G4USP</a>:<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEi7zVfbBKjiLx-tVSX5TtCvd1YL9NBqDTsPPI5pVmSNzC7YZ_s_N04PT8a0W1XvBkqrpRNNlQ-BEn4nAulCEotd3VvzI-YjWW7hEPfUC1RFpMu6DN_JoPByQFsWwmzMaCLRPGOLfxGEvUkZ/s1600/arcs-now-working-properly-pcb-rnd-import-eagle-binary-layout-80m-transceiver.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEi7zVfbBKjiLx-tVSX5TtCvd1YL9NBqDTsPPI5pVmSNzC7YZ_s_N04PT8a0W1XvBkqrpRNNlQ-BEn4nAulCEotd3VvzI-YjWW7hEPfUC1RFpMu6DN_JoPByQFsWwmzMaCLRPGOLfxGEvUkZ/s320/arcs-now-working-properly-pcb-rnd-import-eagle-binary-layout-80m-transceiver.png" width="320" /></a></div>
<br />
and here is a manufacturer supplied footprint for a 50mil spaced header that was only available in an Eagle binary library format:<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhrR1Dp4zDNMG4ERTPKQ0XwscqgmZ01JCnZwSr5P9BfGDpMK1KUQcjEYTASbGGAaykw_DMR-2lEw1wTxh6Rao-bhF7iP88ClYKYaUGbcd60DdBYZJl7Ul72B-kc-lzUMC86xtbQwSQV1QyP/s1600/eagle-binary-component-library-FTSH-105-XX-XX-D-loaded-in-geda-pcb-rnd.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1318" height="174" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhrR1Dp4zDNMG4ERTPKQ0XwscqgmZ01JCnZwSr5P9BfGDpMK1KUQcjEYTASbGGAaykw_DMR-2lEw1wTxh6Rao-bhF7iP88ClYKYaUGbcd60DdBYZJl7Ul72B-kc-lzUMC86xtbQwSQV1QyP/s320/eagle-binary-component-library-FTSH-105-XX-XX-D-loaded-in-geda-pcb-rnd.png" width="320" /></a></div>
<br />
and here is the same header after being exported in Kicad format and loaded into pcbnew:<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgV0VqpvAkVv8AqTVtZjdmWcy6eZePppiCZjgMfCgWCpM6GIySv2oy5xb0ZYz0Rj5kR5Wf1WrfkU9Y1ll2TELx8LZiozIKve_1eytZuGusyNM3kw2qmkXiU4WLq1QG_D7HTh4FlsFmk6UOa/s1600/eagle-binary-component-library-FTSH-105-XX-XX-D-loaded-in-geda-pcb-rnd-exported-to-kicad-pcbnew.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgV0VqpvAkVv8AqTVtZjdmWcy6eZePppiCZjgMfCgWCpM6GIySv2oy5xb0ZYz0Rj5kR5Wf1WrfkU9Y1ll2TELx8LZiozIKve_1eytZuGusyNM3kw2qmkXiU4WLq1QG_D7HTh4FlsFmk6UOa/s320/eagle-binary-component-library-FTSH-105-XX-XX-D-loaded-in-geda-pcb-rnd-exported-to-kicad-pcbnew.png" width="320" /></a></div>
<br />
And here is the legendary TV-be-gone PCB, found in Eagle binary format, and loaded into pcb-rnd:<br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEigp_hLV70jjlQV1g0E9kdRuHWvz-q5BmYidLixAoHkgdpwyw1Mi-DVWFNDg3ptJsUXUquwfvp6V_eTeinvNJ-FPt1O5BJecJbsHK_Mh8tIz35f-wut9nZZ6vuTYCkOCVJp3VcbwqaagTjh/s1600/the-TV-be-gone-eagle-binary-format-layout-loaded-in-FOSS-pcb-rnd-layout-editor.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEigp_hLV70jjlQV1g0E9kdRuHWvz-q5BmYidLixAoHkgdpwyw1Mi-DVWFNDg3ptJsUXUquwfvp6V_eTeinvNJ-FPt1O5BJecJbsHK_Mh8tIz35f-wut9nZZ6vuTYCkOCVJp3VcbwqaagTjh/s320/the-TV-be-gone-eagle-binary-format-layout-loaded-in-FOSS-pcb-rnd-layout-editor.png" width="320" /></a></div>
<br />
<br />
These new capabilities are in SVN head currently, but will be in the next pcb-rnd package release due shortly.<br />
<br />
Caveats include:<br />
<br />
<ul>
<li>Eagle's occasional use of net names which are invalid in pcb-rnd, i.e. '-' for the ground net. These are changed to 'GND' on load if present.</li>
<li>Eagle's allows an element to be named '-', i.e. for a ground terminal. These are changed to 'HYPHEN' on load.</li>
<li>Thermals for features are indirectly defined in the Eagle file format with electrical nets, so thermals are not automatically generated on import at this point in time, but this could be implemented with more work, subject to user demand.</li>
<li>Further to this, an element, i.e. a decoupling capacitor, may have no clearance for one pin on a GND copper polygon, and the other pin may have no clearance for a VCC copper polygon. This can be achieved with padstacks, but the simpler option is to remove one of the pours, sort out the clearance on one of the pins for the remaining plane and proceed to connect the other pin based on the rat lines/DRC.</li>
<li>tDocu and bDocu layer features in elements are currently combined with silk layer features. Once pcb-rnd subcircuit refactoring is complete in the next development cycle, footprints will be able to support both silk and documentation layer features and the import-export plugins will be upgraded accordingly.</li>
</ul>
<br />
A loaded layout or library can be modified and/or saved in pcb-rnd's native file format, or exported into other supported formats which include:<br />
<br />
<ul>
<li>Kicad s-expression and legacy</li>
<li>Protel Autotrax</li>
<li>gEDA PCB</li>
<li>FidoCadJ </li>
</ul>
<br />
allowing pcb-rnd to provide Eagle->gEDA PCB, Eagle->Kicad and Eagle->Protel Autotrax conversion if required, subject to any feature limitations in the target formats.<br />
<br />
As with any of the other layout formats supported by pcb-rnd, an Eagle binary layout can be also be nominated for use as a library in pcb-rnd's preferences.<br />
<br />
In closing, with native support for both Eagle layouts and libraries in pcb-rnd, the need for external utilities such as <a href="https://github.com/bd-at-jollyrogerlabs/eagle2gedapcb">eagle2gedapcb</a> or <a href="https://github.com/erichVK5/translate2geda">translate2geda</a> or the various ulp scripts in existence for exporting to foreign formats from within Eagle is much reduced. It should also be noted that pcb-rnd can be run headless, allowing batch conversion of files from the command line.<br />
<br />
Thanks also to LA3PNA for his help with example files!!Erichhttp://www.blogger.com/profile/06713492721272257911noreply@blogger.com0tag:blogger.com,1999:blog-3244641027778699849.post-43184309890049903772017-09-08T05:11:00.000-07:002017-09-08T05:11:12.764-07:00Importing HPGL plot data into pcb-rnd PCB layouts<a href="https://en.wikipedia.org/wiki/HP-GL">HPGL</a> support has now been added to <a href="http://repo.hu/projects/pcb-rnd/">pcb-rnd</a>, allowing import of HPGL plot data exported from programs such as mechanical CAD packages and graphic design and page layout packages such as Inkscape.<br />
<br />
HPGL, short for "Hewlett Packard Graphics Language", is a simple graphics language tailored to the needs of plotters, allowing multiple pens to be defined, along with paths, arcs, and pen up, and pen down commands.<br />
<br />
The importer code will import an HPGL file into a PCB layout, allowing artwork to be added to copper layers, silkscreen layers, mask layers, or outline layers.<br />
<br />
Importantly, the outline layer is used to define board shapes. If the board is to fit a selected enclosure, the geometry is commonly available in and manipulated with mechanical CAD software packages which can export HPGL.<br />
<br />
Of particular note, pcb-rnd supports subtraction layer types, allowing artwork to be subtracted from soldermask, paste and silk layers to achieve more complicated effects.<br />
<br />
Users keen to convert bitmaps to outlines can achieve this easily in Inkscape with the "convert bitmap to outline" function, followed by export in HPGL format.<br />
<br />
The first step is to import the bitmap into Inkscape<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhFD4G2SZnDZxPq5lCFerK-PAji3ATKa7Y5JlE6yiniBAo1gQzW1CN31QOfFV3MffKmhn8Mu7g5ZDiaK65XinqFQaObm7Ky8-v4EVcm9ppuH24RIJDV342D0xvJ_qWTr-oB2p4vF7A4IJCE/s1600/import-and-embed-bitmap-into-inkscape-for-hpgl-export-to-geda-pcb-rnd-or-kicad.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="768" data-original-width="1366" height="179" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhFD4G2SZnDZxPq5lCFerK-PAji3ATKa7Y5JlE6yiniBAo1gQzW1CN31QOfFV3MffKmhn8Mu7g5ZDiaK65XinqFQaObm7Ky8-v4EVcm9ppuH24RIJDV342D0xvJ_qWTr-oB2p4vF7A4IJCE/s320/import-and-embed-bitmap-into-inkscape-for-hpgl-export-to-geda-pcb-rnd-or-kicad.png" width="320" /></a></div>
<br />
The bitmap is then placed on the sheet:<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEj2OxOSnIsJhXjT9KxZXm-g2656ZwpUJm071aNdSvZTZXfDwVW6-GpDl4_So86gq88ip-7DKndkW9NXZX4RG3PYpUTDjO3E4iziEVNSQv1MBD95KDfmeWvVWHjniM_Hrr8pYcBTkAtBk02V/s1600/dog-bitmap-imported-into-inkscape.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEj2OxOSnIsJhXjT9KxZXm-g2656ZwpUJm071aNdSvZTZXfDwVW6-GpDl4_So86gq88ip-7DKndkW9NXZX4RG3PYpUTDjO3E4iziEVNSQv1MBD95KDfmeWvVWHjniM_Hrr8pYcBTkAtBk02V/s320/dog-bitmap-imported-into-inkscape.png" width="320" /></a></div>
<br />
The bitmap need to be selected with a mouse click: <br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgxTflmBJRHumaGSQHRPbOUwSZge_nv8alIKJJHb4Ow6Ea-F2RgY3B5AnCHu7xtLOUYINeq0hu4uw9peyPEsL60XSG6r08ci_N0T_s7ukerpfroOzq9okFiidwhGuNg_nt44Yzu1bsXc0fI/s1600/bitmap-selected-in-inkscape.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgxTflmBJRHumaGSQHRPbOUwSZge_nv8alIKJJHb4Ow6Ea-F2RgY3B5AnCHu7xtLOUYINeq0hu4uw9peyPEsL60XSG6r08ci_N0T_s7ukerpfroOzq9okFiidwhGuNg_nt44Yzu1bsXc0fI/s320/bitmap-selected-in-inkscape.png" width="320" /></a></div>
<br />
Having done this, the bitmap can be converted to an outline:<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhsylLM4iybz4cOrysxAVSRDGUZptOhn8ofuhuzEOGD-fzkbwGqM2vQMUYFFxYW-tnKdrawkGMwVdMXplcOwG2t3cT2RQhDnTeVLENVjO3onWkPVwzE2mIBgUcJptn4vNl1n4wDh-0WI8e9/s1600/trace-bitmap-function-in-inkscape-prior-to-hpgl-export-to-pcb-rnd.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhsylLM4iybz4cOrysxAVSRDGUZptOhn8ofuhuzEOGD-fzkbwGqM2vQMUYFFxYW-tnKdrawkGMwVdMXplcOwG2t3cT2RQhDnTeVLENVjO3onWkPVwzE2mIBgUcJptn4vNl1n4wDh-0WI8e9/s320/trace-bitmap-function-in-inkscape-prior-to-hpgl-export-to-pcb-rnd.png" width="320" /></a></div>
<br />
The dialogue box even allows the bitmap to be inverted if required:<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgK4R8eLt-CJaITvIvO5Fk_dBeEZpq_gHgxJhX-7LbebnqD3yFImEKzwHd7xZWh00-1ydrwo8eFMS8WC4y9LykEJ7U_YWmD22_61B-6Mj1wfqBNBwcsptXGj-Cx_f2YX_BOhmhGjaymEzS3/s1600/bitmap-traced-and-dialogue-box-in-inkscape-prior-to-hpgl-export-to-pcb-rnd.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="768" data-original-width="1366" height="179" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgK4R8eLt-CJaITvIvO5Fk_dBeEZpq_gHgxJhX-7LbebnqD3yFImEKzwHd7xZWh00-1ydrwo8eFMS8WC4y9LykEJ7U_YWmD22_61B-6Mj1wfqBNBwcsptXGj-Cx_f2YX_BOhmhGjaymEzS3/s320/bitmap-traced-and-dialogue-box-in-inkscape-prior-to-hpgl-export-to-pcb-rnd.png" width="320" /></a></div>
<br />
having traced the outline, the bitmap and the outline will be overlaid on the sheet<br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjVuucQ9467gtGSA32ly2zgUol3_U73kWFm2XQk7ncO8_e3bMI9pRlb7ZgoLh32yWm04SXlCqoVtlqrAH4YMnUlyzf4FukMnNgHHBAIk0sjbUFPMgJprF5M6MxjqS4x9YhaL38aEwvLPv3D/s1600/bitmap-now-traced-in-inkscape-about-to-delete-bitmap-itself.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjVuucQ9467gtGSA32ly2zgUol3_U73kWFm2XQk7ncO8_e3bMI9pRlb7ZgoLh32yWm04SXlCqoVtlqrAH4YMnUlyzf4FukMnNgHHBAIk0sjbUFPMgJprF5M6MxjqS4x9YhaL38aEwvLPv3D/s320/bitmap-now-traced-in-inkscape-about-to-delete-bitmap-itself.png" width="320" /></a></div>
<br />
The bitmap can be deleted, leaving just the traced outline, at which point export to HPGL can be performed:<br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgClwyKmNYb0YTRSb0Si2AQJCkfqeVwi2tDA75GkHpd_rvVIQOZVubO17k8V9YBimQxbKSQTp_oKI4BNofqY2KDHD-TPn694YJmLquR6EUZIyVvMB-zL2sJAf5n-dVE3Z_SDz6WuV5X24uK/s1600/export-hpgl-from-inkscape-for-pcb-rnd-import.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="768" data-original-width="1366" height="179" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgClwyKmNYb0YTRSb0Si2AQJCkfqeVwi2tDA75GkHpd_rvVIQOZVubO17k8V9YBimQxbKSQTp_oKI4BNofqY2KDHD-TPn694YJmLquR6EUZIyVvMB-zL2sJAf5n-dVE3Z_SDz6WuV5X24uK/s320/export-hpgl-from-inkscape-for-pcb-rnd-import.png" width="320" /></a></div>
<br />
After exporting the paths to an HPGL file, the HPGL file can be imported into pcb-rnd<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiGJjns8rpgkp7OVJlML5Pb7nyOdFWh9icZivcjHHoRZhUUHby3QQEFfFA_IQHMgbcZQCxKVt_JtjbDsiA6Pj7cRjbmUxB4VEmdFpA0xdFjhaFqC5bwZnnECf-jrwJ9L5j7hC8pOOR-0k6v/s1600/importing-HPGL-data-into-geda-pcb-rnd-layout-editor.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="724" data-original-width="1366" height="169" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiGJjns8rpgkp7OVJlML5Pb7nyOdFWh9icZivcjHHoRZhUUHby3QQEFfFA_IQHMgbcZQCxKVt_JtjbDsiA6Pj7cRjbmUxB4VEmdFpA0xdFjhaFqC5bwZnnECf-jrwJ9L5j7hC8pOOR-0k6v/s320/importing-HPGL-data-into-geda-pcb-rnd-layout-editor.png" width="320" /></a></div>
<br />
the HPGL data then appears in the paste buffer:<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgQDAxIc_oQT1rqa1INQlOxI3bxVWC1JrFjjtMZWvYxJDFsOGoSSdx9qSRmnTeceBHZX1JhZS4RzmgGLAyPmmCsgWwXQdO-vZvfLU2RmOs65gTyNRmyW4aEfktWBuIQBcPcqwEYd6HdFhEz/s1600/hpgl-data-in-geda-pcb-rnd-paste-buffer.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgQDAxIc_oQT1rqa1INQlOxI3bxVWC1JrFjjtMZWvYxJDFsOGoSSdx9qSRmnTeceBHZX1JhZS4RzmgGLAyPmmCsgWwXQdO-vZvfLU2RmOs65gTyNRmyW4aEfktWBuIQBcPcqwEYd6HdFhEz/s320/hpgl-data-in-geda-pcb-rnd-paste-buffer.png" width="320" /></a></div>
<br />
After clicking, the paste buffer contents appear on the active layer: <br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEg2evwx5-ZqKZ3uckAL7JE4-yyjfZSWgMEiR2W5esWB_5gXlR2tZ5oa-4ZgB8EHJ0s4NsotzdsesT1EQcG7qq5A1cQLDKn3H8FW8LKynM3DOIsMQdMdJ_viSf9A4IXPHY8dpIrd5qgKAvA1/s1600/hpgl-data-pasted-into-geda-pcb-rnd-layout.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEg2evwx5-ZqKZ3uckAL7JE4-yyjfZSWgMEiR2W5esWB_5gXlR2tZ5oa-4ZgB8EHJ0s4NsotzdsesT1EQcG7qq5A1cQLDKn3H8FW8LKynM3DOIsMQdMdJ_viSf9A4IXPHY8dpIrd5qgKAvA1/s320/hpgl-data-pasted-into-geda-pcb-rnd-layout.png" width="320" /></a></div>
<br />
For those playing with Kicad's pcbnew layout editor, this code now
provides a pathway for HPGL->Kicad PCB layout format, since pcb-rnd
supports export to Kicad layout format.<br />
<br />
For those exporting to a Kicad layout, this is as simple as a "Save As" in the File menu, and here is the exported layout in pcbnew: <br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgRQyVUZXiJkJLs1GYK_XQPEUmC20LDxi1zMfHVDlg2qB7JlCgIDfdV4qqZwIVLwnF6f9X2EWqP4T7vDqlzqE2DZxpEaTZ0gb665odjYcElf-nP_Wmnqu1oNg1Xk_ePfAYaYSjCh9MlA2tw/s1600/hpgl-data-exported-from-geda-pcb-rnd-into-kicad-pcbnew-layout-format.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgRQyVUZXiJkJLs1GYK_XQPEUmC20LDxi1zMfHVDlg2qB7JlCgIDfdV4qqZwIVLwnF6f9X2EWqP4T7vDqlzqE2DZxpEaTZ0gb665odjYcElf-nP_Wmnqu1oNg1Xk_ePfAYaYSjCh9MlA2tw/s320/hpgl-data-exported-from-geda-pcb-rnd-into-kicad-pcbnew-layout-format.png" width="320" /></a></div>
<br />
Multilayer combinations are obviously possible, which can then be combined into a single subcircuit if required:<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEheCUDWoIhvejSZVMSrTFZeT8EnWYloJLMobhvmIDtuBkYp42OWeRED-scLiN6py6o7gvQSWWifluPDIRjx59lWcaVBdkPXZOe6GRGrGYXjIqf5ldB0mZJT-OkS3uvN5FwPzUb8Ce5QwPHV/s1600/multiple-layer-hpgl-artwork-imported-into-various-pcb-rnd-layers.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEheCUDWoIhvejSZVMSrTFZeT8EnWYloJLMobhvmIDtuBkYp42OWeRED-scLiN6py6o7gvQSWWifluPDIRjx59lWcaVBdkPXZOe6GRGrGYXjIqf5ldB0mZJT-OkS3uvN5FwPzUb8Ce5QwPHV/s320/multiple-layer-hpgl-artwork-imported-into-various-pcb-rnd-layers.png" width="320" /></a></div>
<br />
In the above screenshot, subtraction layers have been added and can be seen in the layer list on the left.<br />
<br />
Layers can be quickly and easily added to groups by either right clicking in the layer list on the left of the layout window. In addition, layers can also be added, along with manipulation of the layer stackup, in the preferences->layers dialogue window. This dynamic manipulation of the layer stackup is now possible thanks to the extensive layer refactoring previously undertaken in pcb-rnd.<br />
<br />
The next packaged release of pcb-rnd will include the HPGL import code. For now, until then, it can be obtained from svn head and compiled.<br />
<br />
The code that converts the HPGL data resides in a LGPL licensed C89 library called Libuhpgl. Libuhgpl is a small, portable library for parsing and generating HPGL data. It is suited to use in any software that can import or export 2d object models.Erichhttp://www.blogger.com/profile/06713492721272257911noreply@blogger.com1tag:blogger.com,1999:blog-3244641027778699849.post-78004720296275851792017-07-19T10:49:00.000-07:002017-07-20T03:01:53.643-07:00PolyHatch command for cross hatching polygons in pcb-rndDuring development of the Protel Autotrax/Easytrax layout format import/export plugin, a separate polygon helper plugin was also developed to facilitate conversion of complex polygons into cross hatched versions.<br />
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This allowed export of complex Polygons to Protel Autotrax/Easytrax format, which only supports lines and rectangular solid fills.<br />
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Because the cross hatching routine is just another plugin, the command can be applied to any polygon in a layout, if the need arises.<br />
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The command is invoked with the usual colon typed at the keyboard, followed by the command<br />
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i.e. ":PolyHatch(interactive)"<br />
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To use the command, you need to have a polygon or polygons selected. Here, we are using a layout with open hardware logos to demonstrate:<br />
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First, you need to select a polygon to crosshatch. Here, we select a logo on the top silkscreen layer:<br />
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After issuing the command<br />
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:PolyHatch(interactive)<br />
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the interactive dialog window appears:<br />
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The dialog allows the hatching style, clearances and spacing to be specified:<br />
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After hitting OK, the polygon will be crosshatched using the currently selected layer (in this example "Top component" copper), and the new cross hatched version of the polygon will appear in addition to the original polygon:<br />
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The still selected, original polygon can be deleted, leaving the cross hatched version. Note that the cross hatching has appeared on the currently selected top component copper layer, not the top silk layer of the original polygon:<br />
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Multiple polygons can be selected for simultaneous conversion, i.e:<br />
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Note also that we have switched the active layer to the Ground plane layer. We now invoke the :PolyHatch(interactive) command again<br />
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After deleting the selected original polygons which are not needed, we now find the cross hatched versions on the ground plane:<br />
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Free fills or copper pours are a more typical target for the PolyHatch cross hatching function.<br />
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Here is a top copper polygon drawn over a DIP footprint with some additional tracks with associated clearances:<br />
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The polygon is selected, and the :PolyHatch(interactive) command invoked:<br />
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After deleting the original selected polygon, we are left with a cross hatched ground plane:<br />
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It is worth noting that the "Rubberband" tracks placed with rubber band mode contain arcs, and that these arcs have had their clearances preserved, i.e. pcb-rnd, like gEDA PCB, supports DRC for arcs on copper layer.<br />
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In addition to facilitating export to legacy formats such as Protel Autotrax/Easytrax, the PolyHatch plugin is likely to be useful for creating capacitative sensors on PCB layouts, as well as facilitating more creative designs, i.e.<br />
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For those using Kicad, and lacking an easy means of crosshatching a polygon for use as a capacitative sensor or to modify transmission line impedance, pcb-rnd can load and export Kicad format layouts, greatly simplifying this task.<br />
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The above tennis racquets can be saved in Kicad s-expression format quite easily. The only caveat is that Kicad does not support arcs on copper, which were used for the racquet frames. After shifting the racquets to the silk layer (to get around Kicad's limitations with arcs) the layout can be exported with "File:Save As"<br />
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and then saved as a Kicad s-expression format layout<br />
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after which, the layout can be viewed in Kicad's pcbnew layout editor, complete with cross hatched polygons:<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiYZ7rXMToMzzP-Fx9upv5L0b_BnlohnOqf6GHbgbgRpdvg48chEMzC_QHwBlozqe1zDFw-04t5kOMst9tJGtLDN3r_gFeTApoQjOOPhcSTWZqlxXQJxoIzOoOfKTReWxYCXZDiNQ5hK669/s1600/kicad-pcbnew-displaying-cross-hatched-polygons-exported-from-geda-pcb-rnd.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiYZ7rXMToMzzP-Fx9upv5L0b_BnlohnOqf6GHbgbgRpdvg48chEMzC_QHwBlozqe1zDFw-04t5kOMst9tJGtLDN3r_gFeTApoQjOOPhcSTWZqlxXQJxoIzOoOfKTReWxYCXZDiNQ5hK669/s320/kicad-pcbnew-displaying-cross-hatched-polygons-exported-from-geda-pcb-rnd.png" width="320" /></a></div>
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Erichhttp://www.blogger.com/profile/06713492721272257911noreply@blogger.com0tag:blogger.com,1999:blog-3244641027778699849.post-57751284944791732262017-07-07T09:08:00.000-07:002017-07-10T22:33:56.953-07:00pcb-rnd support for Protel Autotrax / Easytrax layout file import and exportAn additional import/export module has been developed in the FOSS PCB layout tool <a href="http://repo.hu/projects/pcb-rnd/">pcb-rnd</a> to allow layouts in Protel Autotrax and Protel Easytrax formats to be imported and exported.<br />
<br />
Protel Autotrax and Protel Easytrax were industry standard DOS based PCB design tools in the early 1990s. Protel Easytrax was a cut down version of Protel Autotrax. The more capable Protel Autotrax required a dongle to operate.<br />
<br />
Altium recently released Protel Autotrax as freeware, and it still has something of a <a href="http://airborn.com.au/layout/autotrax.html">following</a> among those familiar with it who are happy to continue using it in a DOS emulator. Arguably, those with low end hardware in educational or hackerspace contexts may still find Protel Autotrax quite adequate for PCB design stations, particularly now that subsequent conversion to multiple formats is possible with pcb-rnd.<br />
<br />
The import/export feature will primarily be of use to those seeking to:<br />
<ul>
<li>modify previously distributed Protel Autotrax and Easytrax designs in something other than the original Protel Autotrax software</li>
<li>use legacy Protel Autotrax and Easytrax designs sourced from <a href="http://lupinesystems.com/download/">others</a> to generate gerbers for fabrication</li>
<li>export footprints and designs for existing Protel Autotrax users </li>
<li>convert Protel Autotrax and Easytrax designs into any of the other formats supported by pcb-rnd, such as postscript, png, svg, gcode, XYRS, kicad legacy layouts, kicad s-expression layouts, etc...</li>
<li>convert old footprints in Protel Autotrax and Easytrax designs for use in more modern tools.</li>
</ul>
Netlists are also imported along with Protel Autotrax and Easytrax design geometry.<br />
<br />
Because Protel Autotrax and Easytrax only support rectangular polygonal copper pours, the exporter will export any complex, non-rectangular polygons in a design as an outline of the islands and holes, and cross hatch the interior.<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEj1FIn4YGvh_-Cfgiib9bGce-ZHPJM6urtJBYIyXN8g5BvjDNWkbFRNqOc-hXVO_uCbT1dETsXpuxQpsIULgu1d_YvenO_oJp8t6ZZ4ZWR8oW7USIevMzvDFxO8duLioHwAQQc27GTI4wJU/s1600/vlf-receiver-layout-geda-pcb-rnd-exported-layout-round-trip-protel-autotrax-easytrax.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEj1FIn4YGvh_-Cfgiib9bGce-ZHPJM6urtJBYIyXN8g5BvjDNWkbFRNqOc-hXVO_uCbT1dETsXpuxQpsIULgu1d_YvenO_oJp8t6ZZ4ZWR8oW7USIevMzvDFxO8duLioHwAQQc27GTI4wJU/s320/vlf-receiver-layout-geda-pcb-rnd-exported-layout-round-trip-protel-autotrax-easytrax.png" width="320" /></a></div>
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Simple rectangular polygonal pours are however exported as standard Protel Autotrax/Easytrax rectangular "Free Fill" rectangles.<br />
<br />
For lines, 90 degree arc segments, pads and pins, however, exporting to Protel Autotrax format will be essentially lossless, within the limitations of the 1 mil resolution of the Protel Autotrax/Easytrax format, and 90 degree quadrant arc support in the Protel Autotrax/Easytrax format<br />
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Protel Moiro Targets and Cross Hair targets are not supported on import.<br />
<br />
Also, pins and vias with connection/clearance flags for the GND and POWER copper layers are not acted on. This will not be an issue for any designs which do not have dedicated GND and/or POWER copper layers.<br />
<br />
"Multi" and "board" layer elements are combined with the top silk layer during import into pcb-rnd, as they are not explicitly supported as layer types in pcb-rnd.<br />
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"Keepout", which delineates the board outline and cutouts, is mapped to the outline layer in pcb-rnd.<br />
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For those keen to implement an importer for some other format, the <a href="http://igor2.repo.hu/cgi-bin/minisvn.cgi?cmd=browse&repo=pcb-rnd&path=trunk//src_plugins/io_autotrax">io_autotrax</a> code would serve as a good template for those keen to give rolling their own a go. Alternatively, if provided with sufficient, suitable examples and summary information for a given format, we can look at the feasibility of implementing the importer.<br />
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Here's a nixie clock layout from <a href="http://lupinesystems.com/download/">lupinesystems</a><br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhghYcQBAAcHL4FrNa5EVOb_nPirbCBxzGnWQrxEoTDGUa1Cxq-lf86FHqETS6UawJ62grMs20EnwzRkiENWoOOpVpkmSOegASUiNRukJRCIrjP3sdTC_CmVDEhGLeiT-iKn6QO1rHCHUzw/s1600/Autotrax-Easytrax-layout-nixie-tube-clock-imported-into-geda-pcb-rnd.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhghYcQBAAcHL4FrNa5EVOb_nPirbCBxzGnWQrxEoTDGUa1Cxq-lf86FHqETS6UawJ62grMs20EnwzRkiENWoOOpVpkmSOegASUiNRukJRCIrjP3sdTC_CmVDEhGLeiT-iKn6QO1rHCHUzw/s320/Autotrax-Easytrax-layout-nixie-tube-clock-imported-into-geda-pcb-rnd.png" width="320" /></a></div>
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Here's a PICAXE40 radio controller board loaded into pcb-rnd: <br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhy_Tg99z0gAdcVg4Z0G6UKflzWW62sUe9ZuyysgAh7uTshlxuQyu2tO9noadYI7YPl39qlazbGhObU4N0qRWv7gGBja62mmakaGw8rDyeIZi42r1uMOfs0fwwNGrPPDny94iQuegTgIunE/s1600/F5sp-protel-autotrax-layout-format-board-loaded-into-geda-pcb-rnd.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhy_Tg99z0gAdcVg4Z0G6UKflzWW62sUe9ZuyysgAh7uTshlxuQyu2tO9noadYI7YPl39qlazbGhObU4N0qRWv7gGBja62mmakaGw8rDyeIZi42r1uMOfs0fwwNGrPPDny94iQuegTgIunE/s320/F5sp-protel-autotrax-layout-format-board-loaded-into-geda-pcb-rnd.png" width="320" /></a></div>
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Here's a QRP SSB 80m transceiver design loaded into pcb-rnd <br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhWMh9AlFqHd00GBZRdEy2p9hGqVFxef3jnzJYJAmfqkwos2ndrzI4XdI4fcmI3UIMArJxyKdFyN5wtwRKoXHerp0obbUhDjguMc9TSQ1AKkMMIlg8aI0Tx1dF1h3LuKIQtysVu45Q_hhzt/s1600/protel-autotrax-80m-receiver-loaded-imported-by-geda-pcb-rnd.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhWMh9AlFqHd00GBZRdEy2p9hGqVFxef3jnzJYJAmfqkwos2ndrzI4XdI4fcmI3UIMArJxyKdFyN5wtwRKoXHerp0obbUhDjguMc9TSQ1AKkMMIlg8aI0Tx1dF1h3LuKIQtysVu45Q_hhzt/s320/protel-autotrax-80m-receiver-loaded-imported-by-geda-pcb-rnd.png" width="320" /></a></div>
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This screenshot shows the netlists loaded along with a single board Z80 computer layout:<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjjPotjITqMdLpYJRrXD8-RIp5nNVJfRfZwahVBaSTONYe4Ygii-3CZv1RGcCNqpvSW183Riz5LdC-qbPWPRvLEDXZkTPz5V8FO61hicrGFw2UtHRW2E1uigeCCupo4uKZ3Y8UMAI525cx5/s1600/protel-autotrax-netist-being-loaded-into-geda-pcb-rnd-netlist-window-showing-netlists.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="768" data-original-width="1366" height="179" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjjPotjITqMdLpYJRrXD8-RIp5nNVJfRfZwahVBaSTONYe4Ygii-3CZv1RGcCNqpvSW183Riz5LdC-qbPWPRvLEDXZkTPz5V8FO61hicrGFw2UtHRW2E1uigeCCupo4uKZ3Y8UMAI525cx5/s320/protel-autotrax-netist-being-loaded-into-geda-pcb-rnd-netlist-window-showing-netlists.png" width="320" /></a></div>
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this screenshot of the SSB transceiver layout loaded into pcb-rnd shows how Autotrax users create pours without the use of polygons<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiYAiq1r_RCEn_9vK5ugRhn4GXlGwbz67hSXOEdr-BmW7KrAKFZcX3b8VECYxmiD_T0hVl3eah93SuNzq76XIct7aN0jQNYjPqtE1OYK68OxiXP6PwTPFfglhT_Kjd5Wr6cvVg88l7YIkMK/s1600/protel-autotrax-SMD-features-now-importing-into-geda-pcb-rnd.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiYAiq1r_RCEn_9vK5ugRhn4GXlGwbz67hSXOEdr-BmW7KrAKFZcX3b8VECYxmiD_T0hVl3eah93SuNzq76XIct7aN0jQNYjPqtE1OYK68OxiXP6PwTPFfglhT_Kjd5Wr6cvVg88l7YIkMK/s320/protel-autotrax-SMD-features-now-importing-into-geda-pcb-rnd.png" width="320" /></a></div>
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Here's a <a href="https://github.com/erichVK5/VK3BHR-LC-meter">VK3BHR LC-meter</a> design developed in pcb-rnd:<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEixsJ8Jl0TRpCGZWfw3_zRnMuuk0giYOAR449Bc-slxzGXyD5BpM1cKPiO1Q_i9DM7HP7TSdHjbNJUWjLpGfbtC2uHghyphenhyphenDjihJJarC1wFLC73xo2rxh9jk518LBPbTdky6IoLa8H1xbq3oz/s1600/VK3BHR-LC-Meter-in-geda-pcb-rnd-prior-to-export-to-protel-autotrax-easytrax.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEixsJ8Jl0TRpCGZWfw3_zRnMuuk0giYOAR449Bc-slxzGXyD5BpM1cKPiO1Q_i9DM7HP7TSdHjbNJUWjLpGfbtC2uHghyphenhyphenDjihJJarC1wFLC73xo2rxh9jk518LBPbTdky6IoLa8H1xbq3oz/s320/VK3BHR-LC-Meter-in-geda-pcb-rnd-prior-to-export-to-protel-autotrax-easytrax.png" width="320" /></a></div>
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and here it is after a round trip to and from Protel Autotrax format, showing how complex polygonal copper pours are replaced by outlines of the polygonal islands and holes by the exporter, which are then filled with cross hatching: <br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiiUNj0dHLDbgck_R28bG_ZXvJTqojGuVwN-rV_-PqdYt_7vVETW2GuCvpTBY0gCknjL5e15uXyghU0IRB3_H_6Qi6Oz-Udezeae_JQPNfCDbDRfDiNNb80y0iVpFwx0M-Y_irFF-ReW16I/s1600/vk3bhr-lc-meter-pcb-layout-round-trip-to-protel-autotrax-easytrax-loaded-back-into-geda-pcb-rnd.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiiUNj0dHLDbgck_R28bG_ZXvJTqojGuVwN-rV_-PqdYt_7vVETW2GuCvpTBY0gCknjL5e15uXyghU0IRB3_H_6Qi6Oz-Udezeae_JQPNfCDbDRfDiNNb80y0iVpFwx0M-Y_irFF-ReW16I/s320/vk3bhr-lc-meter-pcb-layout-round-trip-to-protel-autotrax-easytrax-loaded-back-into-geda-pcb-rnd.png" width="320" /></a></div>
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Here's another example with cross hatching applied to polygons on export:<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgZep0Uq5halDGsCO9tEOBjRZtOBDs1LmrsgA-TjFQGbsfRcnhrnTUGmwsWE4WBk3iLqaVEeodK5Uw7kBCctFL4Y3aStqP9k30luMXP_WVBQR4rYJFtqxHCoTV1DvxUEh6GVHN0BSyJd_wQ/s1600/geda-pcb-rnd-vlf-receiver-layout.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgZep0Uq5halDGsCO9tEOBjRZtOBDs1LmrsgA-TjFQGbsfRcnhrnTUGmwsWE4WBk3iLqaVEeodK5Uw7kBCctFL4Y3aStqP9k30luMXP_WVBQR4rYJFtqxHCoTV1DvxUEh6GVHN0BSyJd_wQ/s320/geda-pcb-rnd-vlf-receiver-layout.png" width="320" /></a></div>
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after saving as Protel Autotrax, and then loading it back into pcb-rnd, the crosshatching used in place of the complex polygonal copper pour can be seen:<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhwkYQaMZoYbqwQNP8mi2FxUe39W592Rd5ZDPTHl7obH4pctmlmIzrJpHAZ3ajguyuaME3nUZmA_D6RRn9WlcwHXBuTKBhxa3-ci3MvTEmbVHEMdpZpN9pmB44wSJ1TBC2yU9VVuLzwt7u3/s1600/vlf-receiver-layout-geda-pcb-rnd-exported-layout-round-trip-protel-autotrax-easytrax.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhwkYQaMZoYbqwQNP8mi2FxUe39W592Rd5ZDPTHl7obH4pctmlmIzrJpHAZ3ajguyuaME3nUZmA_D6RRn9WlcwHXBuTKBhxa3-ci3MvTEmbVHEMdpZpN9pmB44wSJ1TBC2yU9VVuLzwt7u3/s320/vlf-receiver-layout-geda-pcb-rnd-exported-layout-round-trip-protel-autotrax-easytrax.png" width="320" /></a></div>
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And yeah, here is a q-meter layout by the inimitable <a href="http://www.users.on.net/~endsodds/qm.htm">VK5JST/VK5TR</a><br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhX9Xp2rK9wI1Nq89Fnfg0pdwXDMwZa2q6P-F8UmuKHmYnlmzSDhKOnIM7jTLlPqL6PTOYeRKkA_ZPXq8RTWpcAP2Fd3gksZCwqmMYQbnRKsw1zYakiesn2vHB84W7nL-EbEoT7wxWJI1o6/s1600/vk5jst-vk5tr-q-meter-protel-autotrax-imported-into-geda-pcb-rnd.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="720" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhX9Xp2rK9wI1Nq89Fnfg0pdwXDMwZa2q6P-F8UmuKHmYnlmzSDhKOnIM7jTLlPqL6PTOYeRKkA_ZPXq8RTWpcAP2Fd3gksZCwqmMYQbnRKsw1zYakiesn2vHB84W7nL-EbEoT7wxWJI1o6/s320/vk5jst-vk5tr-q-meter-protel-autotrax-imported-into-geda-pcb-rnd.png" width="320" /></a></div>
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And finally, a frequency meter by <a href="http://www.alternatezone.com/electronics/freq.htm">Dave Jones</a>, yep.... <i>that</i> Dave Jones<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiyRZK6_rZMbCBYVzA4zhZN144KCcCmhtO4hUhc8_sauXoPdm_chm4mjq7gdlYSYjreEUpoQb_XPAPu-UEk_quhbF6_HK-g4xpFah2LYEPuP_4E_MOkXg0dn5uBJ9B1-vpLsZ3Xwu-NtbPz/s1600/dave-jones-frequency-meter-protel-autotrax-imported-into-geda-pcb-rnd.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="768" data-original-width="1366" height="179" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiyRZK6_rZMbCBYVzA4zhZN144KCcCmhtO4hUhc8_sauXoPdm_chm4mjq7gdlYSYjreEUpoQb_XPAPu-UEk_quhbF6_HK-g4xpFah2LYEPuP_4E_MOkXg0dn5uBJ9B1-vpLsZ3Xwu-NtbPz/s320/dave-jones-frequency-meter-protel-autotrax-imported-into-geda-pcb-rnd.png" width="320" /></a></div>
<br />Erichhttp://www.blogger.com/profile/06713492721272257911noreply@blogger.com0tag:blogger.com,1999:blog-3244641027778699849.post-24709477172267396922017-06-09T07:02:00.001-07:002017-06-10T02:22:52.014-07:00template defined, multiple pick and place (PnP) xyrs file format support in pcb-rndFollowing interest by multiple users, the existing XYRS pick and place machine export code has been extended to allow<br />
<br />
<ul>
<li>any one of various formats to be selected during export, and</li>
<li>formats to be easily defined by users with simple additions to two files, a template file and the main exporter</li>
<li>export formats including BOM and formats requiring per-pin and/or per-pad information, even up to details such as pad area for special finishes</li>
</ul>
<br />
The new formats are accessible through the usual export menu:<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEh5Co8ew4q3By2LROW7YMElWNtac8MODzIP17umPkVihogB1BS2oyb7APwKThbXcvX8Qsiz8usa35smV0enxx_NwL08ihNpLoUSeMcdOiofeMOco44Vaeowf2lN3WE_KcDFvIgpCtIv0Y-6/s1600/geda-pcb-rnd-xyrs-kicad-pos-PnP-csv-export-menu-TM220-TM240-openPnP.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="719" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEh5Co8ew4q3By2LROW7YMElWNtac8MODzIP17umPkVihogB1BS2oyb7APwKThbXcvX8Qsiz8usa35smV0enxx_NwL08ihNpLoUSeMcdOiofeMOco44Vaeowf2lN3WE_KcDFvIgpCtIv0Y-6/s320/geda-pcb-rnd-xyrs-kicad-pos-PnP-csv-export-menu-TM220-TM240-openPnP.png" width="320" /></a></div>
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with which selection of the "XY" format presents the XYRS export format options and units for export:<br />
<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhcLB42W1ELSUzNXxnlxmuatD6i4au3nDgfIysES5BQL9vTJp0cZ0uHnyWYXES9qyo2DvowaHhZpHT935EZyeW1CqKsjtHS7MS1xBcpEQcOqxdgETAa13lMjjGoQEktxUfBnI0nXyjI5OQY/s1600/geda-pcb-rnd-xyrs-kicad-pos-PnP-csv-export-menu-options-Macrofab-TM220-TM240-openPnP.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="768" data-original-width="1366" height="179" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhcLB42W1ELSUzNXxnlxmuatD6i4au3nDgfIysES5BQL9vTJp0cZ0uHnyWYXES9qyo2DvowaHhZpHT935EZyeW1CqKsjtHS7MS1xBcpEQcOqxdgETAa13lMjjGoQEktxUfBnI0nXyjI5OQY/s320/geda-pcb-rnd-xyrs-kicad-pos-PnP-csv-export-menu-options-Macrofab-TM220-TM240-openPnP.png" width="320" /></a></div>
<div class="separator" style="clear: both; text-align: center;">
</div>
<br />
For those keen to export a custom format, any new format can be defined in the following file: <br />
<br />
pcb-rnd/trunk/src_plugins/export_xy/default_templ.h<br />
<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgqkqlR2d_ZfDmsnC8PMbsrIN9tyNd1tSjyhCQFs1bLDBvanpDWq0Up4IFqngyOpq9SNX-9zqx53UUrWsJcpW3pkiv4UerMtDBdrSjZLKBQ4GtrDDI1pAeOIaPoCXsE_ghd7xFGLSw0Sgho/s1600/geda-pcb-rnd-xyrs-TM220-TM240-PnP-kicad-pos-export-format-template.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="719" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgqkqlR2d_ZfDmsnC8PMbsrIN9tyNd1tSjyhCQFs1bLDBvanpDWq0Up4IFqngyOpq9SNX-9zqx53UUrWsJcpW3pkiv4UerMtDBdrSjZLKBQ4GtrDDI1pAeOIaPoCXsE_ghd7xFGLSw0Sgho/s320/geda-pcb-rnd-xyrs-TM220-TM240-PnP-kicad-pos-export-format-template.png" width="320" /></a></div>
<br />
The format is pretty self explanatory. The user simply needs to choose a new name for the export type, create suitable text header fields, and then decide on the order of exported values, and their separator.<br />
<br />
Following this, the new exporter type must be added to the existing structure in the xy.c file<br />
<br />
pcb-rnd/trunk/src_plugins/export_xy/xy.c <br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiwxHAs53amHTSN0BEcc4qCaf5pOvTZO1JjLEMCx-j4QaU26TFFFYb5cq-DYT58eTqotJEvrPe3p6Cawto3zDWDTp2I9yWMBAI1bLjup_DefMI3_ypJULjQmcdM5W8UblvzExnb1ILDAGT0/s1600/geda-pcb-rnd-xyrs-TM220-TM240-PnP-kicad-pos-export-format-template-enum-define-section.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="719" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiwxHAs53amHTSN0BEcc4qCaf5pOvTZO1JjLEMCx-j4QaU26TFFFYb5cq-DYT58eTqotJEvrPe3p6Cawto3zDWDTp2I9yWMBAI1bLjup_DefMI3_ypJULjQmcdM5W8UblvzExnb1ILDAGT0/s320/geda-pcb-rnd-xyrs-TM220-TM240-PnP-kicad-pos-export-format-template-enum-define-section.png" width="320" /></a></div>
<br />
and then, to make the new exported format active, it has to be added to the switch statement further down in xy.c :<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgfg1UX8uNjvA3-UNjgmdHzq4HccgzVqo20HbY8NXbbNMqO39RIHfZWdGMZvCUZb4CIMFVNp4Td5rRxB8QAmtXV9X6zmi5msqwKE1HILF5u5C2gw-Ie2Eu3bVHX4yr-HAP5hFW11KlrhEi7/s1600/geda-pcb-rnd-xyrs-TM220-TM240-PnP-kicad-pos-export-format-template-switch-statement-xy-c.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="719" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgfg1UX8uNjvA3-UNjgmdHzq4HccgzVqo20HbY8NXbbNMqO39RIHfZWdGMZvCUZb4CIMFVNp4Td5rRxB8QAmtXV9X6zmi5msqwKE1HILF5u5C2gw-Ie2Eu3bVHX4yr-HAP5hFW11KlrhEi7/s320/geda-pcb-rnd-xyrs-TM220-TM240-PnP-kicad-pos-export-format-template-switch-statement-xy-c.png" width="320" /></a></div>
<br />
<br />
<br />
<br />
<br />
If ./configure has not already been run previously in pcb-rnd/trunk it will need to be run, after which<br />
<br />
make<br />
<br />
in<br />
<br />
pcb-rnd/trunk<br />
<br />
is all that is needed to make the changes active.<br />
<br />
Alternatively, if you have an example of a format you would like implemented in the exporter, someone on <a href="http://repo.hu/projects/pcb-rnd/irc.html">IRC</a> will be able to help you implement it.<br />
<br />
After <a href="https://macrofab.com/">Macrofab</a>, TM220 and TM240 export were added to the exporter, KiCad .pos format was also implemented as a quick and easy demonstration of the template based configuration, and, as a bonus, allow the use of scripts written by <a href="https://www.wayneandlayne.com/blog/2014/09/21/kicad-converter-for-tm-240a-pick-and-place-machines/">KiCad users</a> for further customisation of position files for multiple reel pick and place machines.<br />
<br />
The OpenPnP project can use ordinary xyrs and KiCad .pos files, so pcb-rnd users should have no difficulty using OpenPnP software.<br />
<br />
The default xyrs outputs and .pos outputs are also suitable for assemblers such as <a href="https://www.smallbatchassembly.com/">SmallBatchAssembly</a>.<br />
<br />
The main differences to note between formats<br />
<ul>
<li>are clockwise vs anti-clockwise rotation specified in degrees </li>
<li>the origin of rotation, i.e. what is zero degrees</li>
<li>where the origin of the board is, i.e. bottom-left vs upper-left corner, which affects the y-coordinate direction</li>
<li>delimiters, which can be commas, spaces or tabs</li>
<li>whether layers are called top and bottom, or 1 and 2, respectively</li>
</ul>
Once the requirements are known, any of these aspects can be tailored to suit the required format in the export template.<br />
<br />
The only other cautionary note is that some default footprints may not adhere to the usual conventions relating to rotation and centroid, i.e. pin 1 should be at the top or top left, and the coordinate centroid for the footprint should indeed be the centroid of the element.<br />
<br />
Finally, if your default footprints' description and value fields are transposed, the exported xy file will also have these values transposed. As always, the quality of your final PCB will depend on the validity of the footprint elements you use.Erichhttp://www.blogger.com/profile/06713492721272257911noreply@blogger.com0tag:blogger.com,1999:blog-3244641027778699849.post-11755330199154861662017-06-06T06:50:00.000-07:002017-06-06T06:50:35.640-07:00Using existing pcb layouts as footprint element libraries in pcb-rndRecent additions to the modular import and export code in pcb-rnd have allowed for existing pcb layouts to now be used as footprint element libraries.<br />
<br />
This is likely to be of use in computer labs, organisations maintaining multiple seats with version controlled design elements, and also handy for distributing design element libraries generally.<br />
<br />
The preferences dialogue allows various sources of design elements to be specified, such as wget for <a href="http://gedasymbols.org/">gedasymbols.org</a>, the EDA agnostic <a href="http://repo.hu/projects/edakrill/">edakrill</a> repository, local directories, scripted elements in pcblib, and now board layout files.<br />
<br />
As shown in the screen shot, the path to the file is prepended with<br />
<br />
board@<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgOSlvmG5-LGxJGKFaDcr-yME2qeClgA50qoC5L9methoCQY5mu2txow4KE-sE1uYBYXEjLdy-CnMR-srq-R_S6IYvqMjeqZf80bhOmq-lBqgWXU2arUAsiax0l31R0OM49xYt4IhrSJcoj/s1600/geda-pcb-rnd-using-lihata-natiave-board-as-footprint-element-library.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="768" data-original-width="1366" height="179" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgOSlvmG5-LGxJGKFaDcr-yME2qeClgA50qoC5L9methoCQY5mu2txow4KE-sE1uYBYXEjLdy-CnMR-srq-R_S6IYvqMjeqZf80bhOmq-lBqgWXU2arUAsiax0l31R0OM49xYt4IhrSJcoj/s320/geda-pcb-rnd-using-lihata-natiave-board-as-footprint-element-library.png" width="320" /></a></div>
<br />
<br />
Here is a simple example of the "i" insert element dialogue box, with a native pcb-rnd lihata (.lht) board layout being used as a source of footprints on a new layout:<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjbZ9vUsNhqFryXf36YJVEOJHdi92QzoBfrOeCy4p2oX1l6uuK11ZCYmTosKTa-R9HTMpqJAs-H7KNNuBIoinGV79tZUkmxaPz_vuBfwIRF9vpVdLVlGkJbJ4B68bzdFQuQyEma5tFpjxT3/s1600/geda-pcb-rnd-layout-board-as-footprint-element-library-phono-jack.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="768" data-original-width="1366" height="179" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjbZ9vUsNhqFryXf36YJVEOJHdi92QzoBfrOeCy4p2oX1l6uuK11ZCYmTosKTa-R9HTMpqJAs-H7KNNuBIoinGV79tZUkmxaPz_vuBfwIRF9vpVdLVlGkJbJ4B68bzdFQuQyEma5tFpjxT3/s320/geda-pcb-rnd-layout-board-as-footprint-element-library-phono-jack.png" width="320" /></a></div>
<br />
<br />
The code allows any supported board format to serve as a source of design elements; here is another example of the insert element dialogue, this time using a board layout in gEDA PCB's (.pcb) format:<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiCkMpnFCvMVyNcVvb_tziYrcR21m9qW69nPMkHVcgaR2XyqQduYp3NavR2SZOEtYp_55QhNgcOZuWYUmiKJMVXFrb7dUcBa_Oky-RrHhEOmJM_5D9PAVUw4jWz_biAqTUxsEb07-utQ5gJ/s1600/geda-pcb-rnd-using-native-lihata-as-footprint-element-library.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="768" data-original-width="1366" height="179" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiCkMpnFCvMVyNcVvb_tziYrcR21m9qW69nPMkHVcgaR2XyqQduYp3NavR2SZOEtYp_55QhNgcOZuWYUmiKJMVXFrb7dUcBa_Oky-RrHhEOmJM_5D9PAVUw4jWz_biAqTUxsEb07-utQ5gJ/s320/geda-pcb-rnd-using-native-lihata-as-footprint-element-library.png" width="320" /></a></div>
<br />
Testing of this new feature with more exotic board types would be appreciated, such as Kicad and Eagle XML layouts, so that any corner cases can be identified and dealt with.<br />
<br />
<br />
<br />
<br />
<br />Erichhttp://www.blogger.com/profile/06713492721272257911noreply@blogger.com0tag:blogger.com,1999:blog-3244641027778699849.post-72321551419352236242017-05-31T08:17:00.000-07:002017-05-31T08:35:48.839-07:00New routing options in pcb-rnd including angle-preserving rubber band and curvy knees on silk and copperRecent refinement of the pcb-rnd rubber band code has allowed a radius to be specified (other than the default of zero radius) when routing tracks.<br />
<br />
The key commands:<br />
<br />
Alt+c<br />
<br />
and<br />
<br />
Alt+shift+c<br />
<br />
are used to alter the radius used for bends in the track being routed. These settings can also be adjusted in the preferences dialog.<br />
<br />
With this capability, free-form, artistic trackwork is easier without needing other vector drawing utilities for copper, silk and outline layer features.<br />
<br />
The following creation was done quickly and easily in pcb-rnd without needing to use any svg or similar vector artwork as a preliminary source of contours, thanks to the new radiused rubber band feature:<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgxnEVBPyaZhw4htHLh3EwOxRiJkQ0UmYkwNzTDZUtDN6wfOHh7v3I_zBNZif2D_BobyVJsoacfjMf_HKw-DNRBsUA1-ozXcGqsczv7EhKkczTxYRZ8klFzCtYpYu1TVz-EkRaS-k0gBdD5/s1600/FSM-gEDA-pcb-rnd-arc-track-rubber-band-artistic-routing.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" data-original-height="719" data-original-width="1366" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgxnEVBPyaZhw4htHLh3EwOxRiJkQ0UmYkwNzTDZUtDN6wfOHh7v3I_zBNZif2D_BobyVJsoacfjMf_HKw-DNRBsUA1-ozXcGqsczv7EhKkczTxYRZ8klFzCtYpYu1TVz-EkRaS-k0gBdD5/s320/FSM-gEDA-pcb-rnd-arc-track-rubber-band-artistic-routing.png" width="320" /></a></div>
<br />
DJ Delorie's teardrop code is a longstanding plugin available for both pcb-rnd and gEDA PCB. The teardrops() plugin is enabled in pcb-rnd by default.<br />
<br />
Beyond the merely artistic, this "banana mode" ability is also of interest to those routing RF and high speed signals on their PCB.<br />
<br />
DRC can auto enforce clearances around other features while rubber banding as well, as seen in the videos below.<br />
<br />
Here is the angle preserving <a href="https://archive.org/details/middle-rubber">rubber band mode</a>.<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<iframe allowfullscreen='allowfullscreen' webkitallowfullscreen='webkitallowfullscreen' mozallowfullscreen='mozallowfullscreen' width='320' height='266' src='https://www.blogger.com/video.g?token=AD6v5dxK0bir6UYU_jM6Ov-lxUre16tWoghxDREIjfX_a9qL6SbjqLUeeY5iRUrG--tcZuawPSftlCw6Us_Ntw1oIw' class='b-hbp-video b-uploaded' frameborder='0'></iframe></div>
<br />
Here is the <a href="https://archive.org/details/route-radius">bendy knee support</a> in action.<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<iframe allowfullscreen='allowfullscreen' webkitallowfullscreen='webkitallowfullscreen' mozallowfullscreen='mozallowfullscreen' width='320' height='266' src='https://www.blogger.com/video.g?token=AD6v5dzGU2xb0d2qjGjREIxgD3Za7TFJsnGw8BvpoMLWF4h4xrHjllPk4bjP0Fg2nR6ZodCCrcoHBcymPnSeOrj4' class='b-hbp-video b-uploaded' frameborder='0'></iframe></div>
<br />
<br />
And here is the <a href="https://archive.org/details/pcb-rnd-teardrops">teardrop effect</a> being applied with the ":" key, followed by the<br />
<br />
teardops()<br />
<br />
command.<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<iframe allowfullscreen='allowfullscreen' webkitallowfullscreen='webkitallowfullscreen' mozallowfullscreen='mozallowfullscreen' width='320' height='266' src='https://www.blogger.com/video.g?token=AD6v5dw2JdSyNRpe_qe_3gDLjZXAL0KIC_1dtpaU7l4tsGzTqtTFVgJSMDwM7eYSDa4ONc9eQXWH_v-Wj8vhSk4p1A' class='b-hbp-video b-uploaded' frameborder='0'></iframe></div>
<br />Erichhttp://www.blogger.com/profile/06713492721272257911noreply@blogger.com0tag:blogger.com,1999:blog-3244641027778699849.post-46358398059298200032017-05-08T05:51:00.002-07:002017-12-15T08:59:09.207-08:00pcb-rnd now has native support for Eagle XML (.brd) PCB layout importTaking advantage of the modular import/export infrastructure in pcb-rnd that was first exploited for KiCad s-expression and KiCad legacy layout support, an IO module has recently been developed to allow native import of Eagle XML (.brd) layout files.<br />
<br />
<b>Update!!!!! - December 2017:</b><br />
<br />
pcb-rnd now has native Eagle Binary (V3, v4, v5) import support, as well as Eagle XML and Eagle Binary library (.lib) support.<br />
<br />
This is a significant milestone as it allows recovery of archived Eagle XML and binary format designs by existing or previous Eagle users, as well as facilitating continued distribution and use of open hardware designs originally designed in Eagle and then shared with the maker/OSHW community.<br />
<br />
Here is an example, an Eagle XML format OSHW design, namely, the Replicape A4, from:<br />
<br />
<a href="https://github.com/moto-timo/Replicape/blob/master/PCB_rev_A4/Replicape_A4.brd">https://github.com/moto-timo/Replicape/blob/master/PCB_rev_A4/Replicape_A4.brd</a><br />
<br />
loaded directly into pcb-rnd:<br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjAi1SbwsygREw28-jsTHQNTikurM9g2tmyFH0-OEImsRoDw141vnvoXlvaLmHlrDej6NpDWZ_l9mEQ7tmtuSQiC222WUIuDlf_CHSkouPWiJuCXkezWF91nkSFkIxke_WyR_Ap0TjPHoO1/s1600/Replicape-eagle-XML-layout-loaded-into-gEDA-pcb-rnd.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjAi1SbwsygREw28-jsTHQNTikurM9g2tmyFH0-OEImsRoDw141vnvoXlvaLmHlrDej6NpDWZ_l9mEQ7tmtuSQiC222WUIuDlf_CHSkouPWiJuCXkezWF91nkSFkIxke_WyR_Ap0TjPHoO1/s320/Replicape-eagle-XML-layout-loaded-into-gEDA-pcb-rnd.png" width="320" /></a></div>
<br />
Further testing is needed to refine text scaling and validate element placement/rotation routines.<br />
<br />
Users are invited to experiment and make feature requests or report any issues.Erichhttp://www.blogger.com/profile/06713492721272257911noreply@blogger.com0tag:blogger.com,1999:blog-3244641027778699849.post-21301400823071288892017-04-16T08:29:00.000-07:002017-04-16T08:29:25.935-07:00Bitmap import now supported by pcb-rnd, including Easter eggs<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEg3uqQM27LwMhkrkPMs9eZKsOyvkY31Dl8kofqU7wKG3E6g8EwOR-3-rE9_V4RtMH9_NtRsEHbnm1iw3ybxrlUodayZJVRZLH7j_W2vF0Zhki_aNc6dVGrJ9oJ0qE24mlT-_SMFbpgq8VqT/s1600/easter-egg-support-in-geda-pcb-rnd-with-parametric-footprint-insertion-dialogue.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEg3uqQM27LwMhkrkPMs9eZKsOyvkY31Dl8kofqU7wKG3E6g8EwOR-3-rE9_V4RtMH9_NtRsEHbnm1iw3ybxrlUodayZJVRZLH7j_W2vF0Zhki_aNc6dVGrJ9oJ0qE24mlT-_SMFbpgq8VqT/s320/easter-egg-support-in-geda-pcb-rnd-with-parametric-footprint-insertion-dialogue.png" width="320" /></a></div>
<br />
<br />
Support for parametric footprints within pcb-rnd, the gEDA PCB fork, now allows on the fly insertion of any graphic file type as a silkscreen bitmap, including easter egg depictions, of course, that are supported by the netpbm package that the bitmap() script depends on.<br />
<br />
At this point in time, netpbm supports:<br />
<br />
bmp, fiasco, fits, gem, gif, jpeg, palm, ps, rast, rle, sgi, sir, tiff, xwd, zeiss, png <br />
<br />
which means that any of these image formats can be inserted, on the fly, into a pcb-rnd PCB layout as a bitmap.<br />
<br />
The bitmap() script can be found on the edakrill repository.<br />
<br />
The script files need to be installed in the search path for parametric footprint elements, i.e.<br />
<br />
pcb-rnd/trunk/pcblib/parametric/<br />
<br />
The footprint insertion dialogue is invoked with the usual "i" command, at which point the path to the image can be entered into the bitmap() footprint dialogue as follows, along with pixel size details: <br />
<br />
<div class="separator" style="clear: both; text-align: center;">
<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEi6N8JIHIj-Nd6i4LdhwDNQ4iiO6hG4Zx45liToPX6UFtTI6f45wMWK7mQWHtUZAaGAv_tA1ZIyqtyMmmer6oUP4dq9CK3SV1ZiYthvPQSVnYCRhN8Y_MX46tSBmZ9MWMPTfBZe1GXAg7KF/s1600/parametric-Bitmap-png-jpg-Insertion-in-geda-pcb-rnd-using-footprint-insertion-dialogue.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="179" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEi6N8JIHIj-Nd6i4LdhwDNQ4iiO6hG4Zx45liToPX6UFtTI6f45wMWK7mQWHtUZAaGAv_tA1ZIyqtyMmmer6oUP4dq9CK3SV1ZiYthvPQSVnYCRhN8Y_MX46tSBmZ9MWMPTfBZe1GXAg7KF/s320/parametric-Bitmap-png-jpg-Insertion-in-geda-pcb-rnd-using-footprint-insertion-dialogue.png" width="320" /></a></div>
<br />
At which point the graphic is turned into an element in the buffer:<br />
<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEip4YGM1KAp-OkRvL-PHPqjwpw7wz6SKOSKDa46aqnWvhSk-BlAZCKB8szctczG0qF-JmxhO2Ex0yzJd886nm593Eeak2XNE8dU8PE-ukSwD_wYxePQL2Bogjh-lHg8z27U8SmaWDE3PW1y/s1600/about-to-place-bitmap-png-jpg-on-geda-pcb-rnd-layout-as-footprint.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEip4YGM1KAp-OkRvL-PHPqjwpw7wz6SKOSKDa46aqnWvhSk-BlAZCKB8szctczG0qF-JmxhO2Ex0yzJd886nm593Eeak2XNE8dU8PE-ukSwD_wYxePQL2Bogjh-lHg8z27U8SmaWDE3PW1y/s320/about-to-place-bitmap-png-jpg-on-geda-pcb-rnd-layout-as-footprint.png" width="320" /></a></div>
<br />
Which can then be placed on the layout:<br />
<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgndDocf1lNSK6oyyHw9tFW4k6F34tL368wwvdzs-iq7MPWynE7fTP1gcgO0e56M5yHc4W3Go6MrkZ5Ehoz5odng6LsYvdmIlYFZxet8KnHSApJ5S6BET2ZnB5dhyphenhyphenMlHp6tA7ayiS8b3qX_/s1600/bitmappn-jpg-placed-on-geda-pcb-layout-with-footprint-insertion-dialogue.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgndDocf1lNSK6oyyHw9tFW4k6F34tL368wwvdzs-iq7MPWynE7fTP1gcgO0e56M5yHc4W3Go6MrkZ5Ehoz5odng6LsYvdmIlYFZxet8KnHSApJ5S6BET2ZnB5dhyphenhyphenMlHp6tA7ayiS8b3qX_/s320/bitmappn-jpg-placed-on-geda-pcb-layout-with-footprint-insertion-dialogue.png" width="320" /></a></div>
<br />
This is a somewhat simpler way of inserting images than other workflows including the use of pstoedit or <a href="https://github.com/erichVK5/image2footprint">image2footprint,</a> previously <a href="http://vk5hse.blogspot.com.au/2016/05/adding-images-to-silkscreen-in-geda-pcb.html">described</a>, which are used standalone to generate the layout element for subsequent insertion into the PCB layout.<br />
<br />
Image size and resolution should be kept sensible, as the resulting footprint silkscreen elements will get quite big and bloat a layout if excessively high resolution images are used, and may encounter manufacturer limitations with minimum silkscreen dimensions, i.e. less than 6 or 8 mil, depending on the manufacturer.Erichhttp://www.blogger.com/profile/06713492721272257911noreply@blogger.com0tag:blogger.com,1999:blog-3244641027778699849.post-87645807436615505552017-04-09T08:12:00.000-07:002017-04-09T08:12:03.944-07:00Line, Polygon and Arc objects now supported in pcb-rnd font glyphsFurther work on multiple font support in <a href="http://repo.hu/projects/pcb-rnd/">pcb-rnd</a> handling has led to the addition of support for not just polygons within glyphs, but also arc objects. Until now, gEDA PCB and pcb-rnd have been limited to line objects only within glyphs.<br />
<br />
<a href="http://repo.hu/projects/pcb-rnd/">pcb-rnd</a>'s :FontEdit code has been updated to allow arcs to be edited and saved by those wishing to create their own fonts or modify existing fonts. Those familiar with :FontEdit and :FontSave will appreciate the ability to use arcs when creating rounded glyphs in a new font:<br />
<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhi3Gihx6o-QcsgoQxdp7GojIAdxRMHNtPSVDtk_ar8qajvH0QpXrgldmvwuIOXg3bAFJoYth_JfnfY62tdOMbFIW91wzXxmjGzazv-nNHM8zbPADre0gV2uH_dTsOyfknfU53G9yky_b8I/s1600/EditFont-dialogue-in-pcb-rnd-with-arc-support.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhi3Gihx6o-QcsgoQxdp7GojIAdxRMHNtPSVDtk_ar8qajvH0QpXrgldmvwuIOXg3bAFJoYth_JfnfY62tdOMbFIW91wzXxmjGzazv-nNHM8zbPADre0gV2uH_dTsOyfknfU53G9yky_b8I/s320/EditFont-dialogue-in-pcb-rnd-with-arc-support.png" width="320" /></a></div>
<br />
Fonts with arc objects can be saved as standalone font files in pcb-rnd's new lihata (.lht) file format. These font files can then be easily shared, and loaded into a pcb-rnd layout with the font load window (CTRL-SHIFT-F).<br />
<br />
Here is an example of an arc based default font, (default_arc.lht) alternative to the legacy default_font:<br />
<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiYYlTEbzPIuf26Hx91QYasWJ34ecpxvNSuwJ_aXqheIMbAh4Dq_MOnrbD1_z5QsJb7UEbcx_LsCE8lLA-F9hrMBUVmUSbQgYkEZ-VCqvZ7f9D2nxjDIwFyf4fL3sJmGSYyW9DgKjRGOHBs/s1600/example-of-default-arc-font-in-geda-pcb-rnd.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="179" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiYYlTEbzPIuf26Hx91QYasWJ34ecpxvNSuwJ_aXqheIMbAh4Dq_MOnrbD1_z5QsJb7UEbcx_LsCE8lLA-F9hrMBUVmUSbQgYkEZ-VCqvZ7f9D2nxjDIwFyf4fL3sJmGSYyW9DgKjRGOHBs/s320/example-of-default-arc-font-in-geda-pcb-rnd.png" width="320" /></a></div>
<br />
Multiple fonts can be used simultaneously in pcb-rnd; here is the traditional default_font shown above the arc based example font:<br />
<br />
<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEirlOG7_CuJGYXjUS3ws-gXYIafgyfO8xRIwWeQMfb5fYbp3VNXfWadinPMRRie5jLdxjDgVemu8qsVcD_2DRhHaHBEcr7szK_bps1yBy9_xSwKrWMe6qq2WFwSsZkwSNUiKxGJ8eJkXtM_/s1600/comparing-old-default-font-geda-pcb-and-arc-default-font-pcb-rnd.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="179" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEirlOG7_CuJGYXjUS3ws-gXYIafgyfO8xRIwWeQMfb5fYbp3VNXfWadinPMRRie5jLdxjDgVemu8qsVcD_2DRhHaHBEcr7szK_bps1yBy9_xSwKrWMe6qq2WFwSsZkwSNUiKxGJ8eJkXtM_/s320/comparing-old-default-font-geda-pcb-and-arc-default-font-pcb-rnd.png" width="320" /></a></div>
<br />
<br />
Advantages of the new arc-based font are more compact gerber export, and more compact font description files, since three or more lines can be replaced with just one arc description.<br />
<br />
The traditional default_font remains the default font in pcb-rnd, but users are free to try out the example arc based font in the trunk/font directory in addition to the traditional default_font in the trunk/src directory if keen.<br />
<br />
The default_arc.lht example arc based font is a working example of the new font file syntax, and can be referred to by those keen to design their own fonts.<br />
<br />
Those crafting new font files in lihata (.lht) format should find the format quite human parseable, and need only note that hashes of the form<br />
<br />
ha:j {<br />
<br />
}<br />
<br />
which contain details for a particular glyph, in this case, "j", need have the character escaped if the hash refers to one of the following ASCII chars:<br />
<br />
{ } \ : ~ ; = & #<br />
<br />
and also ASCII 32, the space character, for lihata parsing to behave properly.<br />
<br />
Examples of how to do this can be seen in the default_arc.lht example file, either by
pulling down an svn copy of the repo, or browsing the repo online at<br />
<br />
<a href="http://igor2.repo.hu/cgi-bin/minisvn.cgi?cmd=browse&repo=pcb-rnd&path=trunk">http://igor2.repo.hu/cgi-bin/minisvn.cgi?cmd=browse&repo=pcb-rnd&path=trunk</a><br />
<br />
pcb-rnd also supports multiple font editing options with the updated :FontEdit code via the miantenance menu, allowing editing of the current font within a layouts, or editing of fonts residing on disk:<br />
<br />
<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjC2xsQmpci5p-lu-oPzp1nfOpqJEdy79deXFn39A7QLCtjV0c7lDChqFT_4uTZCqCPlJ4wAkPqKTz5XigQCAlaJstvIon1ItZdqsGFy22gS_IUCLaZqmC4CaX_hGT0muOkypV6G_bAvV_x/s1600/Font-editing-options-in-pcb-rnd-maintenance-menu.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="179" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjC2xsQmpci5p-lu-oPzp1nfOpqJEdy79deXFn39A7QLCtjV0c7lDChqFT_4uTZCqCPlJ4wAkPqKTz5XigQCAlaJstvIon1ItZdqsGFy22gS_IUCLaZqmC4CaX_hGT0muOkypV6G_bAvV_x/s320/Font-editing-options-in-pcb-rnd-maintenance-menu.png" width="320" /></a></div>
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<br />Erichhttp://www.blogger.com/profile/06713492721272257911noreply@blogger.com0tag:blogger.com,1999:blog-3244641027778699849.post-5997341009188684472017-04-06T06:25:00.000-07:002017-04-06T07:15:03.677-07:00QR code and code128 barcode support for PCB layouts now in pcb-rnd, the gEDA PCB fork<div class="separator" style="clear: both; text-align: center;">
</div>
As part of the extensible parametric footprint support in the gEDA PCB fork, <a href="http://repo.hu/projects/pcb-rnd/">pcb-rnd</a>, support for QR-codes and code128 barcodes on pcb layouts has been implemented.<br />
<br />
The necessary awk scripts can be obtained from the EDAkrill repository, <a href="http://repo.hu/projects/edakrill/">http://repo.hu/projects/edakrill/</a><br />
<br />
Installation of the qrencode library on the machine running pcb-rnd is required.<br />
<br />
A QR-code can be instantiated with a footprint attribute like:<br />
<br />
qr(hello world, 37.00mil)<br />
<br />
or<br />
<br />
code128(hello world, 0.001m) <br />
<br />
embedded in a netlist exported from a schematic. The dimension refers to the pixel size.<br />
<br />
Of note, parametric footprints scripts are able to parse the usual dimension suffixes, i.e. mm, mil, dmil, cmil, in, um<br />
<br />
Alternatively, and somewhat simpler, is to simply use the "i" element insertion dialogue within the layout editor to provide the text and pixel dimensions for insertion as a QR-code, i.e.<br />
<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhpHxH4D0ZhV3fTOrsze8C-No6qQV5UFizqBZFyQZpR5Q3Zs_FnRShWtqU746fvDPJ9MniCtZz770Dq4UOIn_aJZs0zncpEfMteDyqkvn9xaP7jyjfbWXt_WZp0YjGoWXY0pDU2ZjS0vnUb/s1600/gEDA-pcb-rnd-insert-element-window.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="179" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhpHxH4D0ZhV3fTOrsze8C-No6qQV5UFizqBZFyQZpR5Q3Zs_FnRShWtqU746fvDPJ9MniCtZz770Dq4UOIn_aJZs0zncpEfMteDyqkvn9xaP7jyjfbWXt_WZp0YjGoWXY0pDU2ZjS0vnUb/s320/gEDA-pcb-rnd-insert-element-window.png" width="320" /></a></div>
<br />
The QR-code text and pixel size can be selected, along with either high or low level error coding:<br />
<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEh4OJtGs0TxeTZy_zkTcMiAspEO5nUEPWqrxCe-kDxUQFCrAfkyH65nzJyCBfXqD8M_CRXNHCGcdsaQHyaQ93E7ZA3xBhms-gAR1YtdloxdRJnKFL00gr4j-oZwas4Ao7GC-L4YIcteNeOG/s1600/click-on-qr-code-parametric-footprint-in-pcb-rnd.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="179" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEh4OJtGs0TxeTZy_zkTcMiAspEO5nUEPWqrxCe-kDxUQFCrAfkyH65nzJyCBfXqD8M_CRXNHCGcdsaQHyaQ93E7ZA3xBhms-gAR1YtdloxdRJnKFL00gr4j-oZwas4Ao7GC-L4YIcteNeOG/s320/click-on-qr-code-parametric-footprint-in-pcb-rnd.png" width="320" /></a></div>
<br />
After this, the QR-code can be placed on the layout, like any footprint element:<br />
<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjWfhxDeXiZNO2_YDH82OZuHfeCp7lvQPqpquV18yhs1VV0P1izMXFITHuK-xI1qaCMo3vxnxhr_YnETliSU4dFM29bRacQzDC77Ln2Is1Y5ctg_3O_fMe7d9eeSJsUlbij7XtnSSPKyoGH/s1600/qr-code-footprint-placed-on-pcb-layout-in-pcb-rnd.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="179" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjWfhxDeXiZNO2_YDH82OZuHfeCp7lvQPqpquV18yhs1VV0P1izMXFITHuK-xI1qaCMo3vxnxhr_YnETliSU4dFM29bRacQzDC77Ln2Is1Y5ctg_3O_fMe7d9eeSJsUlbij7XtnSSPKyoGH/s320/qr-code-footprint-placed-on-pcb-layout-in-pcb-rnd.png" width="320" /></a></div>
<br />
and here's the QR-code with a bit of zoom applied...<br />
<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjOqZu8mI8lWxsKP6Im1fLaMee1_cPiBRVjcl3DaJXOUbnzhyphenhyphenCPJ_UJ9Dv5Hi4aho3TinBBj2FGRXwuMqAa8ekoIOVFsf8i90ZiaA6Udl6pS9JNKv47oaHxj6wDOd3ttMlib-24N3GhBbqh/s1600/bigger-version-of-qr-code-on-pcb-layout-in-geda-pcb-rnd.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjOqZu8mI8lWxsKP6Im1fLaMee1_cPiBRVjcl3DaJXOUbnzhyphenhyphenCPJ_UJ9Dv5Hi4aho3TinBBj2FGRXwuMqAa8ekoIOVFsf8i90ZiaA6Udl6pS9JNKv47oaHxj6wDOd3ttMlib-24N3GhBbqh/s320/bigger-version-of-qr-code-on-pcb-layout-in-geda-pcb-rnd.png" width="320" /></a></div>
<br />
Similarly, a code128 format barcode can be instantiated with a footprint attribute like:<br />
<br />
code128(hello world, 1000.00um)<br />
<br />
or<br />
<br />
code128(hello world, 0.1cm)<br />
<br />
or by instantiating the "i" insert element dialogue, i.e.<br />
<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhNYKFurAZJel3_4OEoABTAgMtfrSLk0rPM2zVEb-PfuIr_KmnQB5PpwMYJkBqrMTj8CCWagEDQDfjN_gqoR1FOktennKqhvyEmfPUc0P1u6jK4QLuCaUZLVkUYzxtNkjdQngFkiKmbF2Rz/s1600/using-code128-dialogue-in-geda-pcb-rnd.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="179" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhNYKFurAZJel3_4OEoABTAgMtfrSLk0rPM2zVEb-PfuIr_KmnQB5PpwMYJkBqrMTj8CCWagEDQDfjN_gqoR1FOktennKqhvyEmfPUc0P1u6jK4QLuCaUZLVkUYzxtNkjdQngFkiKmbF2Rz/s320/using-code128-dialogue-in-geda-pcb-rnd.png" width="320" /></a></div>
<br />
after the height, barcode bar width and text are defined, the element can be placed on the layout:<br />
<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjCAht8D-B-DArhqjSIM0mC-dnO9uxVFmG5zN1P2s7QR2rRy8V16H16dIrJPpt544ivlYFJS2BTCHlUfyYURRG7r09rbiD3N5VMndKJki_QmySXycg4EvKtBmlTZikb-IjUDdqsD3cDaqsu/s1600/code128-bar-code-on-pcb-layout-in-geda-pcb-rnd.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjCAht8D-B-DArhqjSIM0mC-dnO9uxVFmG5zN1P2s7QR2rRy8V16H16dIrJPpt544ivlYFJS2BTCHlUfyYURRG7r09rbiD3N5VMndKJki_QmySXycg4EvKtBmlTZikb-IjUDdqsD3cDaqsu/s320/code128-bar-code-on-pcb-layout-in-geda-pcb-rnd.png" width="320" /></a></div>
<br />
Like any footprint element, the text label can be resized and moved. <br />
<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjCAht8D-B-DArhqjSIM0mC-dnO9uxVFmG5zN1P2s7QR2rRy8V16H16dIrJPpt544ivlYFJS2BTCHlUfyYURRG7r09rbiD3N5VMndKJki_QmySXycg4EvKtBmlTZikb-IjUDdqsD3cDaqsu/s1600/code128-bar-code-on-pcb-layout-in-geda-pcb-rnd.png" imageanchor="1" style="clear: left; float: left; margin-bottom: 1em; margin-right: 1em;"></a><a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjCAht8D-B-DArhqjSIM0mC-dnO9uxVFmG5zN1P2s7QR2rRy8V16H16dIrJPpt544ivlYFJS2BTCHlUfyYURRG7r09rbiD3N5VMndKJki_QmySXycg4EvKtBmlTZikb-IjUDdqsD3cDaqsu/s1600/code128-bar-code-on-pcb-layout-in-geda-pcb-rnd.png" imageanchor="1" style="clear: left; float: left; margin-bottom: 1em; margin-right: 1em;"></a><a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjHCLLGD8S7uAfJkN-5VNO5jKgcBysuRJHPmBk8X_0f_7AGwBY1MOvdYWd4l4OW7Dt124xXC2z3ac6uAFaR7AsZHf3ltbIfiBLJFRMbRFkkS1f1eDOu15fRbbQJXkFWtbg_3bMqkgo1tN7Y/s1600/code128-barcode-text-label-can-be-moved-on-geda-pcb-rnd-layout.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjHCLLGD8S7uAfJkN-5VNO5jKgcBysuRJHPmBk8X_0f_7AGwBY1MOvdYWd4l4OW7Dt124xXC2z3ac6uAFaR7AsZHf3ltbIfiBLJFRMbRFkkS1f1eDOu15fRbbQJXkFWtbg_3bMqkgo1tN7Y/s320/code128-barcode-text-label-can-be-moved-on-geda-pcb-rnd-layout.png" width="320" /></a></div>
<br />
A footprint created this way can be saved from the buffer either before placement, or after copying into the buffer, if a standalone footprint is required, i.e. for importing into KiCad or frequent use.<br />
<br />
Of note, the pairs of awk scripts that implement the qr() and code128() parametric footprints need to be placed in pcb-rnd's<br />
<br />
trunk/pcblib/parametric<br />
<br />
directory, and can serve as templates for your own modifications or alternative parametric footprint types which will automatically show up in the element insertion dialogue on restarting pcb-rnd, if placed in this directory.<br />
<br />
Over time, additional user contributed awk scripts for parametric footprints will also be available on <a href="http://repo.hu/projects/edakrill">edakrill</a>, the new platform and format agnostic EDA repository.Erichhttp://www.blogger.com/profile/06713492721272257911noreply@blogger.com1tag:blogger.com,1999:blog-3244641027778699849.post-55552551008489019652017-03-29T04:27:00.000-07:002017-03-31T08:30:23.773-07:00ISO 3098 CAD compatible font support, dwarven rune, and Klingon support, in the gEDA PCB fork pcb-rndIn keeping with the monthly feature release schedule for <a href="http://repo.hu/projects/pcb-rnd/">pcb-rnd</a>, on April 1, 2017, the gEDA PCB fork <a href="http://repo.hu/projects/pcb-rnd/">pcb-rnd</a> will release new features designed to enhance backwards compatibility, improve compliance with ISO 3098, and anticipate future needs of users.<br />
<br />
The ASCII character set has been ported from the ISO 3098 compatible open font <a href="https://github.com/hikikomori82/osifont">osifont</a> to the new pcb-rnd polygonal glyph format, to allow its use in PCB layouts.<br />
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This complements the existing stroked default font, as well as the stroked Hershey Sans 1 Stroke Font, also available for use within pcb-rnd.<br />
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The commitment to ongoing support for legacy users has been cemented with the addition of a Runic font, believed to be popular among Numenoreans who, it is thought, continue to use awk, C89, and at times, scheme.<br />
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Looking forwards to future users, and in particular, the <span class="inline_editor_value"><span class="rendered_qtext">Treaty of Organia in 2267, a Klingon </span></span><span class="inline_editor_value"><span class="rendered_qtext"><span class="st">pIqaD HaSta</span> font has also been ported to pcb-rnd.</span></span><br />
<span class="inline_editor_value"><span class="rendered_qtext"><br /></span></span>
pcb-rnd retains support for the traditional gEDA PCB font file format,
as well as the new, more fully featured lihata (.lht) file format which
supports lines, arcs and polygons within font glyphs.<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEh044yoz4OdCeP7lAvMdsouqRJsAY1EH0Snb5gMYAw5yEa3kvYJX3avneRbR2Gr-A5dwUtDU5mNocD15rxAbQ5TIgPcUFzRpRNh1pj5cweX2QjT_wRmj0AdO3lYt1RPenpEdC_-PcoKajYt/s1600/geda-pcb-rnd-multiple-font-support-example-osifont-Klingon-Runes.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="179" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEh044yoz4OdCeP7lAvMdsouqRJsAY1EH0Snb5gMYAw5yEa3kvYJX3avneRbR2Gr-A5dwUtDU5mNocD15rxAbQ5TIgPcUFzRpRNh1pj5cweX2QjT_wRmj0AdO3lYt1RPenpEdC_-PcoKajYt/s320/geda-pcb-rnd-multiple-font-support-example-osifont-Klingon-Runes.png" width="320" /></a></div>
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhc9z36jZqypJJ-voSTg_EcTkyhBEdYFuduwtPof6oJ4i7nj_dEeUWga49D_Pmw1KwDtaX2voSin4lKvgyW_Df3q6ppmGyyM93ZlRRSDnSDAJYSDY0MqsZb8LAJ9vKXLTObyoj0WVys-z85/s1600/Exporting-Gerber-from-geda-pcb-rnd-layout.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="179" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhc9z36jZqypJJ-voSTg_EcTkyhBEdYFuduwtPof6oJ4i7nj_dEeUWga49D_Pmw1KwDtaX2voSin4lKvgyW_Df3q6ppmGyyM93ZlRRSDnSDAJYSDY0MqsZb8LAJ9vKXLTObyoj0WVys-z85/s320/Exporting-Gerber-from-geda-pcb-rnd-layout.png" width="320" /></a></div>
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<span class="inline_editor_value"><span class="rendered_qtext"><br /></span></span>
<span class="inline_editor_value"><span class="rendered_qtext">Here's a screen shot of the exported gerber being viewed in the gerber viewer <i>gerbv</i>, showing dwarvish runes, Klingon, osifont, and the Hershey Sans One Stroke font.</span></span><br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjvJO7DAy2kQLWXDB051QuiF0VsC59ZBqU1pEw8CZ97tNsAMDEZwELeg7uFE_ln-b1jhSFYwjdTWWbiPgfgpY1MgIHAeVwnVtjBv11CISs1MnEcNRJvw1RimmTI8uQGd5zgDj462ivTR7iK/s1600/gerbv-viewing-klingon-osifont-dwarven-runes-hershey-font-from-geda-pcb-rnd.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="167" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjvJO7DAy2kQLWXDB051QuiF0VsC59ZBqU1pEw8CZ97tNsAMDEZwELeg7uFE_ln-b1jhSFYwjdTWWbiPgfgpY1MgIHAeVwnVtjBv11CISs1MnEcNRJvw1RimmTI8uQGd5zgDj462ivTR7iK/s320/gerbv-viewing-klingon-osifont-dwarven-runes-hershey-font-from-geda-pcb-rnd.png" width="320" /></a></div>
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The support for these fonts has been made possible by the multiple font support <a href="http://vk5hse.blogspot.com.au/2017/02/multiple-font-support-now-available-in.html">recently implemented</a> in <a href="http://repo.hu/projects/pcb-rnd/">pcb-rnd</a>, in addition to the newly implemented support for polygons within font glyphs in the new pcb-rnd lihata (.lht) file format used for both pcb layouts and font files.<br />
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Both stroked fonts and polygonal glyph fonts (.lht) are dealt with in the font browser window:<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhp2CqyMC07nQcZ7tSQERr4e-l92Grg6FCVxPApZVrVLL8hDYiAJ92Kg4ngjOFrEKnk7lZ5lXcreSX18_hsfJLrWLwAzsI9F6QzRKycRveICuQfVLGoSOP7Bl52VrR7JswC1VGJgiWOAEZm/s1600/PCB-RND-FontSelectorWindow.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhp2CqyMC07nQcZ7tSQERr4e-l92Grg6FCVxPApZVrVLL8hDYiAJ92Kg4ngjOFrEKnk7lZ5lXcreSX18_hsfJLrWLwAzsI9F6QzRKycRveICuQfVLGoSOP7Bl52VrR7JswC1VGJgiWOAEZm/s320/PCB-RND-FontSelectorWindow.png" width="320" /></a></div>
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhSAmEm5-BTfQTDhNyMP5INjRzDelokiqyOBVZVTRXKPIozCrdZh3sgAs_sgxfT5I-1MhoLUFuilsv7QDVen222DN3Fm6EWKOdmu9enEFtzNw5gElZjK2vccsOixUh7savvrfgbccyxK3tY/s1600/SelectFont.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="179" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhSAmEm5-BTfQTDhNyMP5INjRzDelokiqyOBVZVTRXKPIozCrdZh3sgAs_sgxfT5I-1MhoLUFuilsv7QDVen222DN3Fm6EWKOdmu9enEFtzNw5gElZjK2vccsOixUh7savvrfgbccyxK3tY/s320/SelectFont.png" width="320" /></a></div>
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiUPdow7iWfnBojjSZTe6qQe85dJpWg42XIXKMrcQlKXbZB-S-McQGqntP8aC6WQj7__-2uetSEeH-MGqagoXnJqELjI4OU1ptpDD806axzPFJmwdTNQgQygsXhUZZ2gsacxJjc3D6eN035/s1600/pcb-rnd-multiple-font-demo.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiUPdow7iWfnBojjSZTe6qQe85dJpWg42XIXKMrcQlKXbZB-S-McQGqntP8aC6WQj7__-2uetSEeH-MGqagoXnJqELjI4OU1ptpDD806axzPFJmwdTNQgQygsXhUZZ2gsacxJjc3D6eN035/s320/pcb-rnd-multiple-font-demo.png" width="320" /></a></div>
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The new pcb-rnd file format even allows an individual refdes to have an individual font allocated, if required:<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhJTAsVTleE3j-VirqBR_NEpsc0VNtV3Kzp5FVpVDSj6vJLq2Ur8YgTnLJOSGa49evlPOzizFUYSQAwCepDMxi4lnFW25P3hPLHgRF2bthQOJY2SS7VRfcVLURS0iDrVARyiKyrT09AoTAW/s1600/RefDesFontsToo.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhJTAsVTleE3j-VirqBR_NEpsc0VNtV3Kzp5FVpVDSj6vJLq2Ur8YgTnLJOSGa49evlPOzizFUYSQAwCepDMxi4lnFW25P3hPLHgRF2bthQOJY2SS7VRfcVLURS0iDrVARyiKyrT09AoTAW/s320/RefDesFontsToo.png" width="320" /></a></div>
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To join in on the fun, head on over and grab yourself a copy of <a href="http://repo.hu/projects/pcb-rnd/">pcb-rnd</a>.<br />
<span class="inline_editor_value"><span class="rendered_qtext"><br /></span></span>
<span class="inline_editor_value"><span class="rendered_qtext">To convert truetype fonts into pcb-rnd compatible lihata font files, you'll need to use the Apache Batik utility ttf2svg to convert the desired glyphs to SVG glyphs.</span></span><br />
<span class="inline_editor_value"><span class="rendered_qtext"><br /></span></span>
<span class="inline_editor_value"><span class="rendered_qtext">These SVG glyphs can then be converted to a pcb-rnd compatible font file with the <a href="https://github.com/erichVK5/outlineFont2centrelineFont">outlineFont2centrelineFont</a> utility.</span></span>
<span class="inline_editor_value"><span class="rendered_qtext">The </span></span><span class="inline_editor_value"><span class="rendered_qtext"><span class="inline_editor_value"><span class="rendered_qtext"><a href="https://github.com/erichVK5/outlineFont2centrelineFont">outlineFont2centrelineFont</a></span></span> utility is still a work in progress, but it was used to generate the Klingon, Dwarven Rune and osifont files pretty quickly and easily. The </span></span><span class="inline_editor_value"><span class="rendered_qtext"><span class="inline_editor_value"><span class="rendered_qtext"><a href="https://github.com/erichVK5/outlineFont2centrelineFont">outlineFont2centrelineFont</a></span></span> README explains how to go about doing the conversion. All that remains to be done with it is automatic merging of inside and outside paths in truetype or svg glyphs (these were done manually for the fonts shown).</span></span><br />
<span class="inline_editor_value"><span class="rendered_qtext"><br /></span></span>
<span class="inline_editor_value"><span class="rendered_qtext">Over time, new fonts in legacy and/or lihata (pcb-rnd .lht) will be added to the new EDA tool agnostic repository, EDAkrill:</span></span><br />
<span class="inline_editor_value"><span class="rendered_qtext"><br /></span></span>
<span class="inline_editor_value"><span class="rendered_qtext"><a href="http://repo.hu/projects/edakrill/">http://repo.hu/projects/edakrill/</a></span></span><br />
<span class="inline_editor_value"><span class="rendered_qtext"><br /></span></span>
<span class="inline_editor_value"><span class="rendered_qtext">The EDAkrill project is an effort to create a platform and toolchain agnostic repository of footprints, symbols, fonts and anything else EDA related.</span></span><br />
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<span class="inline_editor_value"><span class="rendered_qtext"><br /></span></span>Erichhttp://www.blogger.com/profile/06713492721272257911noreply@blogger.com0tag:blogger.com,1999:blog-3244641027778699849.post-49250287227504535112017-03-20T06:27:00.000-07:002017-03-22T07:59:03.595-07:00Converting inkscape paths to pcb-rnd and gEDA PCB layouts, lines and footprint elements<div class="separator" style="clear: both; text-align: center;">
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Inkscape is a powerful FOSS vector graphics tool that allows editing of complex paths which can then be exported to various formats.<br />
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Being able to export paths to PCB layout software is useful for a number of reasons, such as enabling custom or artisanal board outlines and tracks to be implemented, such as the following <a href="https://hackaday.io/project/19904-noo-dleus-ex-machina-freeform-pcb-design-proto">flying spaghetti monster (FSM)</a> designed with <a href="http://repo.hu/projects/pcb-rnd/">pcb-rnd</a> and <a href="https://github.com/DarwinNE/FidoCadJ">FidoCadJ</a>:</div>
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEh_FsWuIS3V5YJxB82NKNdUlUe6oHeu7VuTgeolexiyImnlB28eB3KUzpREKBocSW3H8Iw9pNka5opqoL6DRFTj9q7gLpFHoETx5l8_XcaScN-Hkp2YJ4_2OFt0vaKBdVKbSUIFIS0EpwiZ/s1600/FSM-flying-spaghetti-monster-hackvana-pcb-fidocadj-geda-pcb-rnd.gif" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="184" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEh_FsWuIS3V5YJxB82NKNdUlUe6oHeu7VuTgeolexiyImnlB28eB3KUzpREKBocSW3H8Iw9pNka5opqoL6DRFTj9q7gLpFHoETx5l8_XcaScN-Hkp2YJ4_2OFt0vaKBdVKbSUIFIS0EpwiZ/s320/FSM-flying-spaghetti-monster-hackvana-pcb-fidocadj-geda-pcb-rnd.gif" width="320" /></a> </div>
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or allowing <a href="http://vk5hse.blogspot.com.au/2017/03/exotic-and-complex-footprint-creation.html">intelligent design</a> of exotic footprints like the following touch pad example:</div>
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjTwxBH2sMt84uNyx90C9fh7jrANpGJZI1Azi2K4tl8nIeW4aoeEG_Vd2xuoUofgNVziTdcbtw119fc28iMIJkZ15FLuM0nSK3PDKzca9vclgg4WfTTVe_rbkVlkPjZp3iOdPoa5H-7K0i5/s1600/Silk-Elements-Shifted-To-Copper-in-gEDA-PCB-RND.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="202" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjTwxBH2sMt84uNyx90C9fh7jrANpGJZI1Azi2K4tl8nIeW4aoeEG_Vd2xuoUofgNVziTdcbtw119fc28iMIJkZ15FLuM0nSK3PDKzca9vclgg4WfTTVe_rbkVlkPjZp3iOdPoa5H-7K0i5/s320/Silk-Elements-Shifted-To-Copper-in-gEDA-PCB-RND.png" width="320" /></a></div>
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After looking at an Inkscape HPGL export module written by Aaron Spike, a pair of python modules were written, based on the Inkscape's HPGL exporter.<br />
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These extension scripts are available from:<br />
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<a href="https://github.com/erichVK5/inkscape2pcb">https://github.com/erichVK5/inkscape2pcb</a><br />
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and the *.py and *.inx scripts need to be copied (you'll probably need sudo / superuser privileges) into your local inkscape extensions folder, i.e.<br />
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/usr/share/inkscape/extensions<br />
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After starting Inkscape up again, and creating a design...<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiKnb2lk4G4P-htwhH6L6RYGaujAJO_RKs_WSOHb6H684cQ5WotA0nPF20nD-xxARGa88ZmSSAYc4k88p02I6zPaL-j2is2kSoNRC1L9PAC06WpU4Yq10OaV6h-P1w_3H1UuL0dgPSeV3T1/s1600/Original-In-Inkscape.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiKnb2lk4G4P-htwhH6L6RYGaujAJO_RKs_WSOHb6H684cQ5WotA0nPF20nD-xxARGa88ZmSSAYc4k88p02I6zPaL-j2is2kSoNRC1L9PAC06WpU4Yq10OaV6h-P1w_3H1UuL0dgPSeV3T1/s320/Original-In-Inkscape.png" width="320" /></a></div>
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...you should have the options to export to both gEDA PCB footprint (.fp) format, and to pcb-rnd layout (.lht) format available in the "Save As:" menu:<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjf1lTmE-HtxAexMG__GKKBL82l6e7u9XgYCwR0VLkJuFPhuiWQRiCQ-Ifc_B2ErMet5vmLIceT7KqARdvQTalAVrywUspgLnDT3FWh_ZMaMaHJXQQXJgt_63LEomi1fjJQlKNgMvTNN57I/s1600/inkscape-export-geda-pcb-rnd-layout-footprint-options.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="167" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjf1lTmE-HtxAexMG__GKKBL82l6e7u9XgYCwR0VLkJuFPhuiWQRiCQ-Ifc_B2ErMet5vmLIceT7KqARdvQTalAVrywUspgLnDT3FWh_ZMaMaHJXQQXJgt_63LEomi1fjJQlKNgMvTNN57I/s320/inkscape-export-geda-pcb-rnd-layout-footprint-options.png" width="320" /></a></div>
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The paths in the layout are automatically flattened and converted to line segments in the exporter:<br />
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Here's the exported layout being viewed in pcb-rnd, the fork of gEDA PCB:<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgbvg58EZijW7uQadDl-rgQz1PNQjdtjSmmqAGSoQ11ffvZ7TGsAgt7N1VfkbZcnNDWoEI-3Nsfgv9L1IYBLmK9Oimg_iiJyJ_shikdw2zpHiaNRkjHBAE31-2qmh5bjvaBLQJ2qdg3CPKu/s1600/exporting-from-inkscape-to-geda-pcb-rnd-layout.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgbvg58EZijW7uQadDl-rgQz1PNQjdtjSmmqAGSoQ11ffvZ7TGsAgt7N1VfkbZcnNDWoEI-3Nsfgv9L1IYBLmK9Oimg_iiJyJ_shikdw2zpHiaNRkjHBAE31-2qmh5bjvaBLQJ2qdg3CPKu/s320/exporting-from-inkscape-to-geda-pcb-rnd-layout.png" width="320" /></a></div>
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And here's the layout exported as a footprint, being viewed in gEDA PCB. <br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhxKrgxBh7EBk7Pd-YWZMvU1eq_vuSGDlvI7snwIoiI8HDBEzuUg8CpbMYAeul5AjfFzGkVFAfNCuj4d1GeihlIp7saeYkwbX5TK3wUUkfGKldV5b2PmccR7wwB0QyHO6t_NwrqdjNt9z9s/s1600/gEDA-PCB-footprint.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="167" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhxKrgxBh7EBk7Pd-YWZMvU1eq_vuSGDlvI7snwIoiI8HDBEzuUg8CpbMYAeul5AjfFzGkVFAfNCuj4d1GeihlIp7saeYkwbX5TK3wUUkfGKldV5b2PmccR7wwB0QyHO6t_NwrqdjNt9z9s/s320/gEDA-PCB-footprint.png" width="320" /></a></div>
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Naturally, KiCad users can use the same scripts to export footprint designs, since KiCad can import gEDA PCB footprint (.fp) natively.<br />
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There may be scope to improve the code by implementing export of solid polygons, but more needs to be learned about Inkscape's internal data structures first.<br />
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Support for specifying line thickness has also been added to the export dialog, and can range from 8mil (default) to 250mil (mil being thousands of an inch, a.k.a. thou, a.k.a. 254 microns, a.k.a. 0.254mm). This is a fairly sane range of values, but the thickness can always be changed in gEDA PCB or pcb-rnd if necessary.<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEikZdKqyl8MGaNjFO9xKDgWBLjRFXed3ZOqoCvpGj2ODVCqxVBDPRHnK6pTLdO6Dm6_Mj-3P0qJUai45l7C3H1JzdutP6n-99UoXTKnkolwvywsf1iWd1qoxh2sCnZCBm_2jseW3OwK0FrF/s1600/line-thickness-option-in-geda-pcb-rnd-export.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="167" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEikZdKqyl8MGaNjFO9xKDgWBLjRFXed3ZOqoCvpGj2ODVCqxVBDPRHnK6pTLdO6Dm6_Mj-3P0qJUai45l7C3H1JzdutP6n-99UoXTKnkolwvywsf1iWd1qoxh2sCnZCBm_2jseW3OwK0FrF/s320/line-thickness-option-in-geda-pcb-rnd-export.png" width="320" /></a></div>
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The scripts have been tested with "px" as the default unit of measurement in Inkscape. One "px" maps to one mil in gEDA PCB and pcb-rnd; users will need to confirm that exported dimensions are maintained when exporting; if not, the dpi setting could be experimented with for scaling during export.<br />
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In closing, it should be mentioned that accurate geometry in Inkscape is most easily achieved by individually clicking on nodes, and then manually entering their required coordinates. Erichhttp://www.blogger.com/profile/06713492721272257911noreply@blogger.com0tag:blogger.com,1999:blog-3244641027778699849.post-70615013472746005792017-03-15T07:44:00.000-07:002017-03-15T07:44:17.647-07:00Importing Mentor Graphics Design Capture netlists into gEDA pcb-rndIn the continued effort to have <a href="http://repo.hu/projects/pcb-rnd/" target="_blank">pcb-rnd</a> (the actively developed fork of the gEDA PCB layout tool) support additional import and export formats, the ability to import netlists from the Mentor Graphics Design Capture has now been added and tested.<br />
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Based on a set of example files supplied by a Mentor Graphics Design Capture user, import has been implemented following reverse engineering of the EDIF files supplied.<br />
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Of note, the importer does not use the old EDIF import code, relying instead on the s-expression parser library more recently developed for KiCad import.<br /><br />
The importer allows use of the native Mentor parts database, with a regex based translation table during import into pcb-rnd that translates Mentor's parts into pcb-rnd native footprint names. This can use any attribute of the input part and can generate the pcb footprint using parts of the input string,<br />
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e.g. there is a single rule that says if Part Name is Dummy_HDR 1x2 P:2.54mm, extract the "1x2" and the "P:2.54mm" sections and add attribute <br />
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footprint=connector(1, 2, 2.54mm)<br />
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which is a valid pcb-rnd parametric footprint.<br />
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This feature allows those using the Mentor Graphics Design Capture for schematic design to then layout a PCB in pcb-rnd based on the exported schematic netlist. The supported export netlist format is a flattened EDF file.<br />
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Options for further development and improvements include attempts to import mentor footprints (i.e. geometry), and possibly attempts to import hierarchic netlists, with subsequent flattening within pcb-rnd.<br />
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Starting with a Mentor Graphics Design Capture schematic<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgcix5Gr9TOi-Jh3dNkf3njm5LiU_5BEeU5HzDMYpVp_NY98Xvz82PvmF3EFtxeP07TcascGuQqNrcPxt-ceyOj2g-QsF2r38baMoThvSNRUMZAs1J0tfvHd9YkvaXH2TD3c_Ehw74weg8j/s1600/Mentor-schematic-for-export-to-gEDA-pcb-rnd.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="242" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgcix5Gr9TOi-Jh3dNkf3njm5LiU_5BEeU5HzDMYpVp_NY98Xvz82PvmF3EFtxeP07TcascGuQqNrcPxt-ceyOj2g-QsF2r38baMoThvSNRUMZAs1J0tfvHd9YkvaXH2TD3c_Ehw74weg8j/s320/Mentor-schematic-for-export-to-gEDA-pcb-rnd.png" width="320" /></a></div>
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the next step is to generate a netlist for importing by pcb-rnd based on the Mentor Graphics Design Capture schematic; the first thing is to open the utilities menu<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEi1ZHV0YYQJI4vlc4w7IsC0bLrMMB3M0oz304kc6GyDi6q3lvnKn4Yy8u5AVjPV6yExHY6g95AZklI_LCWVsUowrzFqZ8fmYvDWEQrao8hr459FhFP0PzP5QiZGJ0WiBe3OrOi7sekK1LDF/s1600/mentor-graphics-design-capture-exporting-netlist.jpg" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="187" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEi1ZHV0YYQJI4vlc4w7IsC0bLrMMB3M0oz304kc6GyDi6q3lvnKn4Yy8u5AVjPV6yExHY6g95AZklI_LCWVsUowrzFqZ8fmYvDWEQrao8hr459FhFP0PzP5QiZGJ0WiBe3OrOi7sekK1LDF/s320/mentor-graphics-design-capture-exporting-netlist.jpg" width="320" /></a></div>
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In this menu, the option for exporting a netlist in EDIF format can be selected. In particular, the flattened schematic option must be selected:<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjeyGZPszC2_ABlh6rvCmo3wmOWD0MgAJJwmXGoUKL-tkHaaP17ifHhP_h9xhjwCnmZkoKDEwCrJ1INNxLMV05MGsE_-sd6XzmZ_p_E2XVqlp9cxxZXUTMLJQI9_fA361ZLjXVRAvpTFR7E/s1600/Mentor-Graphics-Design-Capture-exporting-netlist-in-edif-format.jpg" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="187" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjeyGZPszC2_ABlh6rvCmo3wmOWD0MgAJJwmXGoUKL-tkHaaP17ifHhP_h9xhjwCnmZkoKDEwCrJ1INNxLMV05MGsE_-sd6XzmZ_p_E2XVqlp9cxxZXUTMLJQI9_fA361ZLjXVRAvpTFR7E/s320/Mentor-Graphics-Design-Capture-exporting-netlist-in-edif-format.jpg" width="320" /></a></div>
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If successful, an EDIF format netlist should be written to your filesystem:<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjyB2no9LXw70kEFSEkpAHETxHXyyu9j8q8bi7ASuBbyfeR-LikeP6NY9w2X2CNwePGYzyVJr5GKwZvN7msccybCpLvowtPcoApeVZYi9iNij5IjDL2uNMdpnOQWqiiOJD0VEYdKsymbArX/s1600/Mentor-Graphics-Design-Capture-writing-edif-netlist-to-file.jpg" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="195" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjyB2no9LXw70kEFSEkpAHETxHXyyu9j8q8bi7ASuBbyfeR-LikeP6NY9w2X2CNwePGYzyVJr5GKwZvN7msccybCpLvowtPcoApeVZYi9iNij5IjDL2uNMdpnOQWqiiOJD0VEYdKsymbArX/s320/Mentor-Graphics-Design-Capture-writing-edif-netlist-to-file.jpg" width="320" /></a></div>
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The next step is to load the netlist file within pcb-rnd:<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhJxKq7p_2YKKC9Jje3mnGDEVudorq8yXk-U5BTLUGMfj3fyeCgMYqLA9KHaNGYaFX8asa-5bvvFynKWTcaZJBzb8wSTJe68Xql679YydvRcygfDcvRYwh44hWu7jGekxK5bu4fdk23wVWV/s1600/importing-Mentor-Graphics-Design-Capture-EDIF-netlist-into-gEDA-pcb-rnd.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhJxKq7p_2YKKC9Jje3mnGDEVudorq8yXk-U5BTLUGMfj3fyeCgMYqLA9KHaNGYaFX8asa-5bvvFynKWTcaZJBzb8wSTJe68Xql679YydvRcygfDcvRYwh44hWu7jGekxK5bu4fdk23wVWV/s320/importing-Mentor-Graphics-Design-Capture-EDIF-netlist-into-gEDA-pcb-rnd.png" width="320" /></a></div>
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhihROW4S5VL9hBgIR9nWZ3BDWI8GqTU7y4xxqkexJmemQXG3U5-3CKQUuALXK-eEu3VTR967WprGRQJ2G2nYz0kEwZSRb5oqNEnK8z5_0Qne2aMpa3y6euzBRwGaEAgqHcKjbD8v9FbS8f/s1600/importing-edf-EDIF-netlist-file-into-pcb-rnd.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="167" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhihROW4S5VL9hBgIR9nWZ3BDWI8GqTU7y4xxqkexJmemQXG3U5-3CKQUuALXK-eEu3VTR967WprGRQJ2G2nYz0kEwZSRb5oqNEnK8z5_0Qne2aMpa3y6euzBRwGaEAgqHcKjbD8v9FbS8f/s320/importing-edf-EDIF-netlist-file-into-pcb-rnd.png" width="320" /></a></div>
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It is at this point the footprints should be seen on the layout, and connections can be viewed with the rats nest optimize 'o' button:</div>
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjv0VDdmUz7XyYgxW3VXb-vX7HRN-U7tC1DbvSnRilYgO_kCYBjLJ_baQDZ7md2TT-HE3brtNRhjFhuOJ8umAHNWUGE6_NdYtgPyGv5hj9ZnVBW_jsEV9gc_ZH4asVxMHotb_R3Bas87oM-/s1600/mentor-schematic-design-imported-into-gEDA-pcb-rnd.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjv0VDdmUz7XyYgxW3VXb-vX7HRN-U7tC1DbvSnRilYgO_kCYBjLJ_baQDZ7md2TT-HE3brtNRhjFhuOJ8umAHNWUGE6_NdYtgPyGv5hj9ZnVBW_jsEV9gc_ZH4asVxMHotb_R3Bas87oM-/s320/mentor-schematic-design-imported-into-gEDA-pcb-rnd.png" width="320" /></a></div>
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from here, PCB layout proceeds as usual, with, of course, the option of adding additional footprints with the insert 'i' command.</div>
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<br />
In closing, the <a href="http://repo.hu/projects/pcb-rnd/" target="_blank">pcb-rnd</a>
project is keen to enable a variety of workflows and foster
interoperability between layout and design tools. If you have a
preferred schematic design tool, or are considering a move away from an
existing tool and would like to see the ability to import legacy
designs, feel free to get in touch with the developers on <a href="http://repo.hu/projects/pcb-rnd/irc.html">irc.</a>Erichhttp://www.blogger.com/profile/06713492721272257911noreply@blogger.com0tag:blogger.com,1999:blog-3244641027778699849.post-88519370770143505672017-03-09T03:35:00.001-08:002017-03-22T08:03:13.836-07:00Exotic and complex footprint creation for gEDA PCB, pcb-rnd and KiCad pcbnew using FidoCadJ<div class="separator" style="clear: both; text-align: center;">
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Sometimes there are complex or exotic footprints that need to be made which are most easily achieved with bezier curve, cubic spline and ellipsoidal features in addition to the usual rectilinear elements. <br />
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A good example of one such footprint came up on the Kicad forums; a contact pad for use with rubber dome pushbutton switches which have a conductive underside which shorts out the gap in the exposed pad:<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEi4mXGG99Wixo1Os-bGtAWYe9kDVgCXv8jFOscexg56DjWz9C0ST5yuRitiduEOSVghDfdAoEYcrK_uU43eKV-LVZGRwKRT1dvzjEFVP02XTqrwySCA3NXkt_ybLwvu2we9FwB6cw9XSeeG/s1600/GoalFP.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="256" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEi4mXGG99Wixo1Os-bGtAWYe9kDVgCXv8jFOscexg56DjWz9C0ST5yuRitiduEOSVghDfdAoEYcrK_uU43eKV-LVZGRwKRT1dvzjEFVP02XTqrwySCA3NXkt_ybLwvu2we9FwB6cw9XSeeG/s320/GoalFP.png" width="320" /></a></div>
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The fairly symmetrical design and filleted features are a natural fit for the cubic bezier, ellipsoid and cubic spline support in FidoCadJ, the no nonsense 2D cross platform CAD package which now has an export module for exporting these design features as line elements in a gEDA PCB / pcb-rnd layout.<br />
<br />
The design was fairly quickly prototyped in FidoCadJ at a scale that suited the features. It should be noted that on export, FidoCadJ allows a magnification factor to be provided to allow the design to be magnified or shrunken, so the 5mil grid in FidoCadJ never becomes a limitation.<br />
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The design was executed on the "circuit" layer in FidoCadJ, since this is the default layer, and when exported to gEDA PCB / pcb-rnd format by the export module, is exported to the rear silk layer with 10mil lines by default.<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgooZxyn3lmfJGjT14kbEEINGTeO-DYpXNkTedhGCdjQ6KuS-DOGR4xV9SZz65-b6PGMYb5GwSGa0_CJp15PR3cE8oj0-yfIv6gYDy8Nfs9b5UxE4rZtXztgPHX7nm2-_JApPT9xPiVngXz/s1600/FidoCadFP.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgooZxyn3lmfJGjT14kbEEINGTeO-DYpXNkTedhGCdjQ6KuS-DOGR4xV9SZz65-b6PGMYb5GwSGa0_CJp15PR3cE8oj0-yfIv6gYDy8Nfs9b5UxE4rZtXztgPHX7nm2-_JApPT9xPiVngXz/s320/FidoCadFP.png" width="320" /></a></div>
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After creating the outline and the interlocking features with cubic splines and lines, the internal, open portions were hatched with additional lines to act as fill. Following this, the layout was exported to a gEDA PCB / pcb-rnd (.pcb) layout using a magnification ratio of 0.18, which generated a footprint of the desired dimensions (~ 6mm round):<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiM5iYmo9hordV7hZD1QzuajR-qVZhc_abi7gUWYX65p4GpngtpvmWM0eCv0LtcG4N8XckV3VgUyqcb7hknAbhRn2Y_8gJZeiIk28_OnfOxgRtIbm3QNhyXp7zP4GQvT4WcYFH3ifxnad7C/s1600/Exporting-FP-to-gEDA-PCB-RND.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="179" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiM5iYmo9hordV7hZD1QzuajR-qVZhc_abi7gUWYX65p4GpngtpvmWM0eCv0LtcG4N8XckV3VgUyqcb7hknAbhRn2Y_8gJZeiIk28_OnfOxgRtIbm3QNhyXp7zP4GQvT4WcYFH3ifxnad7C/s320/Exporting-FP-to-gEDA-PCB-RND.png" width="320" /></a></div>
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The exported layout was then loaded in pcb-rnd, the fork of gEDA PCB. The same process would work with mainline gEDA PCB.<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEifT_hyqGT70uF1mAAI5HUydU9_EjJIDh07e1Ovp7Q6Pr1o9gGo825a6226Mmjo4jRaJisodTVYmPV2JjQvnPXSpxkSSy3irKhJE7emf-RroJF_D72lCIZx1iXP30Z4ocKLwOMRhIwqFHw-/s1600/FP-fine-tuned-in-PCB-RND.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="194" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEifT_hyqGT70uF1mAAI5HUydU9_EjJIDh07e1Ovp7Q6Pr1o9gGo825a6226Mmjo4jRaJisodTVYmPV2JjQvnPXSpxkSSy3irKhJE7emf-RroJF_D72lCIZx1iXP30Z4ocKLwOMRhIwqFHw-/s320/FP-fine-tuned-in-PCB-RND.png" width="320" /></a></div>
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The layout can be flipped in pcb-rnd / PCB with the tab key, if the underside is to be viewed, as above.<br />
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For an essentially round design such as this, a more uniformly contoured outer margin can be achieved by using an encircling ellipsoid, and deleting un-necessary line segments. This was ultimately done in this case, to create a more uniformly rounded appearance than cubic beziers were able to achieve.<br />
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Looking at the line elements from the front, the elements were selected with Alt-A, and then Ctrl-C was used to copy them into the buffer:<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjXaWC8rRyC56wm3DaGyWV_ZBlT8ukEQ-6emRiDk4zKsOuU9lB5i-DO3VeURMxury1QW4R8lSMB7x7NcXp97_sjyCHtsKKPsBxlBcKOeewF52Px7BGgatjyI94HDlBlCCxwtM7Wo8xyC8fC/s1600/Copy-The-elements-in-PCB-RND.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="194" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjXaWC8rRyC56wm3DaGyWV_ZBlT8ukEQ-6emRiDk4zKsOuU9lB5i-DO3VeURMxury1QW4R8lSMB7x7NcXp97_sjyCHtsKKPsBxlBcKOeewF52Px7BGgatjyI94HDlBlCCxwtM7Wo8xyC8fC/s320/Copy-The-elements-in-PCB-RND.png" width="320" /></a></div>
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This design has point symmetry, enabling the copied elements to be mirrored twice, or rotated, to complete the other half of the footprint. The buffer contents were mirrored Left-Right:<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhSGg8GpheSQix55s4ooXEonvXQGJhKjb4yLu94m5_XWBevNtNPpp1mwEUKyHBxJ5g5GiLrP8k5l07Jw8K8l2jJp9CyCiyLThwSIVjqNqtnQiZOOXD0WAm0WCAEJFxGpe3RQcY31zdnHstW/s1600/Mirror-Buffer-in-PCB-RND.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="194" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhSGg8GpheSQix55s4ooXEonvXQGJhKjb4yLu94m5_XWBevNtNPpp1mwEUKyHBxJ5g5GiLrP8k5l07Jw8K8l2jJp9CyCiyLThwSIVjqNqtnQiZOOXD0WAm0WCAEJFxGpe3RQcY31zdnHstW/s320/Mirror-Buffer-in-PCB-RND.png" width="320" /></a></div>
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and the buffer was then mirrored Up-Down:<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjdbWmgGcCLP_mHU9vpgOLjsmiGxlrtPblYMZ2wZ7P0EHhJzsCX8VECoO3dPD9PAPIXBjHo8dfmAINglIz8hR1Y4lGEvllaCz7PjUtBSrf4Xeo8nyKYz7JchNQLBGtwj3WxrsDWJrSlsHbA/s1600/Flip-Mirrored-buffer-in-PCB-RND.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="194" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjdbWmgGcCLP_mHU9vpgOLjsmiGxlrtPblYMZ2wZ7P0EHhJzsCX8VECoO3dPD9PAPIXBjHo8dfmAINglIz8hR1Y4lGEvllaCz7PjUtBSrf4Xeo8nyKYz7JchNQLBGtwj3WxrsDWJrSlsHbA/s320/Flip-Mirrored-buffer-in-PCB-RND.png" width="320" /></a><br />
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The transformed buffer elements are then placed where they belong, completing the basic design. Some of the "fingers" were lengthened a little to fine tune the spacing, and any residual gaps in the hatched areas were filled with additional lines:<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhLrirpjTr3zHMOx-oIuAAITnS53aEYY9SjrvoQLRvlStiApFAIsEoDUVoqQYQgowOjGxftMn76JBi9hUN9XWTfBG01Q9p70ebsAdYz_QvpDM6YzmdtKfbv7fp4zpCJe4CcnETcAJKKpkiZ/s1600/footprint-flipped-mirrored-pasted-in-PCB-RND.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="194" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhLrirpjTr3zHMOx-oIuAAITnS53aEYY9SjrvoQLRvlStiApFAIsEoDUVoqQYQgowOjGxftMn76JBi9hUN9XWTfBG01Q9p70ebsAdYz_QvpDM6YzmdtKfbv7fp4zpCJe4CcnETcAJKKpkiZ/s320/footprint-flipped-mirrored-pasted-in-PCB-RND.png" width="320" /></a></div>
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At this stage, the elements can be moved from the bottom silk layer to the front copper layer. First of all, the top copper layer needs to be selected in the layer list in the left dialogue of the gEDA PCB / pcb-rnd screen. Once the intended layer is selected, Alt-A is used to select all of the elements, and then "Shift-M" is used to move the elements to the top copper layer: <br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEh39Nejbj0FV4jz1OpYylUTbvkYh-OVIxEp_WvvMrHp2S-RS1aJfjeaTUQTbnmwVFseHhqFkYOnnDuITC98IAgNmNmIlK_Qgo148hhtCwJeq0my0J2nG5G7HLUn34H0Ac0jnDvxEE-XNKBi/s1600/Silk-Elements-Shifted-To-Copper-in-gEDA-PCB-RND.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="202" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEh39Nejbj0FV4jz1OpYylUTbvkYh-OVIxEp_WvvMrHp2S-RS1aJfjeaTUQTbnmwVFseHhqFkYOnnDuITC98IAgNmNmIlK_Qgo148hhtCwJeq0my0J2nG5G7HLUn34H0Ac0jnDvxEE-XNKBi/s320/Silk-Elements-Shifted-To-Copper-in-gEDA-PCB-RND.png" width="320" /></a></div>
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At this point, a KiCad pcbnew user can simply use the "Save As" dialogue to save the layout in either KiCad legacy or KiCad s-expression format, at which point it can be loaded into pcbnew for further manipulation: <br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjQdbtcXQRf7nuzuN_0F9Rcde2o7EQZnkR5irygR06hULq6hH2tgaWtQN26CRkkjFS5MlIaRzYxTSeF3ASQ_mBA3565AXYiPkvUkEJT8EHuyXm5k4nx5gG1SldA6CXN7DqrA-5WUS81_NOL/s1600/Viewing-Exotic-footprint-in-kicad-pcbnew.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjQdbtcXQRf7nuzuN_0F9Rcde2o7EQZnkR5irygR06hULq6hH2tgaWtQN26CRkkjFS5MlIaRzYxTSeF3ASQ_mBA3565AXYiPkvUkEJT8EHuyXm5k4nx5gG1SldA6CXN7DqrA-5WUS81_NOL/s320/Viewing-Exotic-footprint-in-kicad-pcbnew.png" width="320" /></a></div>
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gEDA users keen to create a gEDA PCB / pcb-rnd compatible footprint can proceed to do so by again using "Alt-A" to select all of the elements, followed by "Ctrl-X" to cut the elements to the buffer. Ensure the cursor is over an appropriate centroid or origin for the planned footprint - in this case the centre of the element was chosen for the mouse pointer location when "Ctrl-X" was used:<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjE-OuhnDs6VToMqKkfgKwMBFXHsESmuGvmHq3jJ8-iV-bA8GlR7b1YjxXs6gMaH4Scl7c2faWN5LZ71IgH44zLSv528kXJ_CEMG9QYUo-BdpDgKyqrovhA6SW2LZpdIhyphenhyphenShbZ9RIuxgLzB/s1600/Selected-All-Copper-in-PCB-RND.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="179" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjE-OuhnDs6VToMqKkfgKwMBFXHsESmuGvmHq3jJ8-iV-bA8GlR7b1YjxXs6gMaH4Scl7c2faWN5LZ71IgH44zLSv528kXJ_CEMG9QYUo-BdpDgKyqrovhA6SW2LZpdIhyphenhyphenShbZ9RIuxgLzB/s320/Selected-All-Copper-in-PCB-RND.png" width="320" /></a></div>
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Using the "Buffer" menu, the buffer contents can be converted to a footprint with "Convert Buffer To Element" command:<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjWPKFGn4fkuDbOaxPYMxXfD8U4zhKA2yHIjKddEPKV6CURq_PNbdjfxovWE1-YprJUJVrYliaONpfKrsRtc0282BtGdVmTNxWg1wceh2CFBhDEh_qpcEkZ3F8axcQlVyXyaIMxWpR9QPa6/s1600/Convert-Buffer-To-Element-gEDA-PCB-RND.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="207" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjWPKFGn4fkuDbOaxPYMxXfD8U4zhKA2yHIjKddEPKV6CURq_PNbdjfxovWE1-YprJUJVrYliaONpfKrsRtc0282BtGdVmTNxWg1wceh2CFBhDEh_qpcEkZ3F8axcQlVyXyaIMxWpR9QPa6/s320/Convert-Buffer-To-Element-gEDA-PCB-RND.png" width="320" /></a></div>
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Which results in the new element (footprint):<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEh80bLG-ohomP1h4MmBxDM3HBiL-03wdfFD0LRkIdOT1jyilbwLXc1-istaBaJNxd99Lv2n8SJ5o2-RpZ7vk1-mUeChQTwQVeLVhRngBuI_V3suwMDaWCC6szGtgBcTn1GtyTOzgMeT6YFU/s1600/Buffer-Converted-To-Element-in-gEDA-PCB-RND.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="202" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEh80bLG-ohomP1h4MmBxDM3HBiL-03wdfFD0LRkIdOT1jyilbwLXc1-istaBaJNxd99Lv2n8SJ5o2-RpZ7vk1-mUeChQTwQVeLVhRngBuI_V3suwMDaWCC6szGtgBcTn1GtyTOzgMeT6YFU/s320/Buffer-Converted-To-Element-in-gEDA-PCB-RND.png" width="320" /></a></div>
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At this point the element can be saved to a footprint file:<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjSCBCTUo_0HM3zRL9j1ODD-VBZAU8o0Wk7isboovHA4TT2198T44gTmLQxtcrVnPJdvgjDWNDYD3K1IPyIosCyl8ud-2-eCQ5XIDvpyUYhltipet5LtmpJsFn3OH334s2xO4TZSKTHcnbD/s1600/Save-Buffer-Elements-To-File-gEDA-PCB-RND.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="179" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjSCBCTUo_0HM3zRL9j1ODD-VBZAU8o0Wk7isboovHA4TT2198T44gTmLQxtcrVnPJdvgjDWNDYD3K1IPyIosCyl8ud-2-eCQ5XIDvpyUYhltipet5LtmpJsFn3OH334s2xO4TZSKTHcnbD/s320/Save-Buffer-Elements-To-File-gEDA-PCB-RND.png" width="320" /></a></div>
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Here's the final result, a footprint being viewed in pcb-rnd:<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjCqrSoQrpqROAZUYV-_fFFi9kvMXF11lEzADb8BtUaZD_wTmGfp5l2Eiyf95sLBRLea_S_ANdNZkRizwVM3vGhyphenhyphen7yf4eZd3FmFR24BrXHj8rg0pbeLl5koFxLKo5PLorNODKkjErs7m3qe/s1600/Final-Fp-In-PCB-RND.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="202" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjCqrSoQrpqROAZUYV-_fFFi9kvMXF11lEzADb8BtUaZD_wTmGfp5l2Eiyf95sLBRLea_S_ANdNZkRizwVM3vGhyphenhyphen7yf4eZd3FmFR24BrXHj8rg0pbeLl5koFxLKo5PLorNODKkjErs7m3qe/s320/Final-Fp-In-PCB-RND.png" width="320" /></a></div>
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The remaining work required for use with a netlist and design rules checking is suitable numbering of the overlapping pads, to end up with two distinct electrical groups of pads, numbered either pad "1", or pad "2".<br />
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In a complex footprint design like this (ultimately with 401 distinct pads!), this is most easily achieved by loading the footprint into a text editor and doing some search and replace on the consecutively numbered pads.<br />
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Alternative approaches to creating a footprint like this would include using pstoedit, or tracing outlines in a utility like inkscape, and then <a href="http://vk5hse.blogspot.com.au/2017/03/converting-inkscape-paths-to-pcb-rnd.html">exporting</a> in a format compatible with one's preferred PCB layout editor or an intermediate conversion utility.<br />
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The method described is efficient, and appears to be the quickest and least painful method for complex curve creation in footprints at present.<br />
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It is worth noting that FidoCadJ now has support for loading a background image, which, with suitable scaling of the image prior to use, can provide a background template for duplication with cubic bezier, cubic spline, line and ellipsoidal elements.Erichhttp://www.blogger.com/profile/06713492721272257911noreply@blogger.com0tag:blogger.com,1999:blog-3244641027778699849.post-49093086995478275482017-03-07T09:29:00.000-08:002017-12-15T08:58:11.787-08:00Converting Eagle (.brd) layouts to gEDA PCB / pcb-rnd (.pcb) formatEagle has been a popular CAD program in some parts of the electronics community for many years, thanks to its multi-platform support and fairly integrated, "one stop shop" offering.<br />
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Accordingly, many open hardware designs and community contributed footprints and symbols now exist as a result.<br />
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The issue that naturally arises is how best to leverage and extend existing community contributed IP in the form of schematic symbols, footprints and layouts.<br />
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For some time (since the advent of the Eagle XML file format) gEDA users (and by extension, KiCad users able to import gEDA footprints into their pcbnew layout tool) have been able to extract schematic symbols and footprints from Eagle library (.lbr) and board layout (.brd) files by using <a href="https://github.com/erichVK5/translate2geda" target="_blank">translate2geda</a>.<br />
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The current limitations of this conversion pathway via <a href="https://github.com/erichVK5/translate2geda" target="_blank">translate2geda</a> are <br />
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1) polygonal pads (albeit rarely encountered) in Eagle are not supported in gEDA footprints<br />
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2) board layout conversion has not yet been implemented, due to Eagle's frequent use of rotated footprints within layouts, necessitating some refactoring to allow this to work smoothly.<br />
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3) following on from 2), to convert symbols and footprints in a layout file (.brd), you need to rename it to a .lbr file before running it through <a href="https://github.com/erichVK5/translate2geda" target="_blank">translate2geda</a><br />
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Issues 2) and 3) are simply a matter of finding time to write more code.<br />
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Issue 1) will require extensions to pad definitions within gEDA PCB and pcb-rnd in due course.<br />
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So, how best to get an Eagle layout into a format for use within the gEDA ecosystem?<br />
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<b>Update!!!!! - May 2017:</b><br />
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<a href="http://vk5hse.blogspot.com/2017/05/pcb-rnd-now-has-native-support-for.html">pcb-rnd now has native Eagle XML import support</a><br />
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<b>Update!!!!! - December 2017:</b><br />
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pcb-rnd now has native Eagle Binary (V3, v4, v5) import support, as well as Eagle XML and Eagle Binary library (.lib) support<br />
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... and now back to our previous programming:<br />
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A fairly imperfect method is to find gerber files generated by Eagle, and use <a href="https://github.com/erichVK5/translate2geda" target="_blank">translate2geda</a> to convert the gerber files into footprints for use as a template within gEDA PCB, pcb-rnd, or KiCad. It's simple enough to do:<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhWbAVWKe_Lq876Ri6nDzl8AB0NJTa0th9KAsd-yrnT3YMXNPJxzAgNiWHOtPlymKyiJpd4cyV7dhrGpxFl5iJDW2WsoBZ3eJ-m-6uCgFRxUn7AkF8ck_Lwlj33HJylU0bGJzuiQw2o9SQ1/s1600/using-Translate2geda-to-convert-gerber-to-geda.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="106" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhWbAVWKe_Lq876Ri6nDzl8AB0NJTa0th9KAsd-yrnT3YMXNPJxzAgNiWHOtPlymKyiJpd4cyV7dhrGpxFl5iJDW2WsoBZ3eJ-m-6uCgFRxUn7AkF8ck_Lwlj33HJylU0bGJzuiQw2o9SQ1/s320/using-Translate2geda-to-convert-gerber-to-geda.png" width="320" /></a></div>
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Here's a converted layer one (.L1) gerber from the SM1000 codec2 smart microphone designed by Rick Barnich KA8BMA and David Rowe VK5DGR:<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgqqM9i1DKu6T6j3PGfYXSERgbD1rELZRRrBacXH-85t9_Gk7qnzNqcIV6uWCFndWqBi4IhZS6yEq-9MACdR0fVHI_XQzSH1V8L8Ur5X7njKScj62noBJ8CP90uItZDCDhZo01qqxPwk2vD/s1600/SM1000-L1-as-footprint.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="199" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgqqM9i1DKu6T6j3PGfYXSERgbD1rELZRRrBacXH-85t9_Gk7qnzNqcIV6uWCFndWqBi4IhZS6yEq-9MACdR0fVHI_XQzSH1V8L8Ur5X7njKScj62noBJ8CP90uItZDCDhZo01qqxPwk2vD/s320/SM1000-L1-as-footprint.png" width="320" /></a></div>
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Although the converted gerber-as-footprint is not without uses, the biggest problem with it is Eagle's tendency to paint any gerber features with a raster of lines which is not<br />
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1) a simple track,<br />
2) a round pad, or,<br />
3) a square pad<br />
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This can be seen in the following screenshot where a number of features have been highlighted<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgdkXRnkSzdgfYFXxZZtRh6leHHJVQRpwoyQ6Rcm-kY3TfLsEC6Ra5MiokImB0a6AyMxZRRspCzahkQdjK7qATreRWW2r3RbBqS2Q_x3BrXbUofuwEdvr1lOTOv8TdbtoZcLHje6M9hbioH/s1600/Eagle-paints-gerber-features.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgdkXRnkSzdgfYFXxZZtRh6leHHJVQRpwoyQ6Rcm-kY3TfLsEC6Ra5MiokImB0a6AyMxZRRspCzahkQdjK7qATreRWW2r3RbBqS2Q_x3BrXbUofuwEdvr1lOTOv8TdbtoZcLHje6M9hbioH/s320/Eagle-paints-gerber-features.png" width="320" /></a></div>
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As the good people at UCAMCO hath doth verily spake unto us in their "open letter on standard gerber"<br />
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<a href="https://www.ucamco.com/files/downloads/file/95/open_letter_on_standard_gerber.pdf" target="_blank">"Consider this happening not just once, but maybe hundreds of times, and in different sizes, across a densely populated PCB, and it quickly becomes obvious that painted features are every CAM engineer's nightmare"</a><br />
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As well as resulting in a bloated design description file (and gerbers), this will limit the usefulness of gerbers converted in this way when it come to snapping items to features in the footprint.<br />
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The other limitation is the difficulty <a href="https://github.com/erichVK5/translate2geda" target="_blank">translate2geda</a> encounters in trying to identify what is a pad and what isn't during conversion; non square and non round flashed polygons aren't necessarily going to appear on the layout as a pad with heuristics currently implemented in <a href="https://github.com/erichVK5/translate2geda" target="_blank">translate2geda</a>.<br />
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At present, a more workable pathway is to take advantage of the (FOSS) KiCad project's layout editor, pcbnew, which is able to import Eagle XML layouts.<br />
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Here's the same SM1000 layout being viewed in pcbnew:<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgIkAQ2x54XCWZo3E_HzPA0wKQhFz2pBWj9MAkWwerK3MFej6GHG1c25spXtxvHLjWSkNOZc9375Mi-HYNikD5PiUfP3vPQ-CtIroa_UBO1VaeLg4d3mKYVRDhaLStMAt1UUZOFh70ZqsYk/s1600/SM1000-in-kicad-pcbnew.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgIkAQ2x54XCWZo3E_HzPA0wKQhFz2pBWj9MAkWwerK3MFej6GHG1c25spXtxvHLjWSkNOZc9375Mi-HYNikD5PiUfP3vPQ-CtIroa_UBO1VaeLg4d3mKYVRDhaLStMAt1UUZOFh70ZqsYk/s320/SM1000-in-kicad-pcbnew.png" width="320" /></a></div>
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And here is the file dialogue being used in pcbnew to save it in pcbnew's s-expression layout format (.kicad_pcb).<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjWpk6zNfhNkOWQRYQ3CPv7Re7DChgD8FHii2K9pksOzwDeiXtAnEMp64l-neL0Md_v4OphmOiwqw93JwRvS5TQIgdGm9tTGf3wXgZ1IUIMd1tw5NAcqZsvlx58RkFrPlEY0BATo42_fq4l/s1600/Kicad-Save-As-kicad_pcb.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjWpk6zNfhNkOWQRYQ3CPv7Re7DChgD8FHii2K9pksOzwDeiXtAnEMp64l-neL0Md_v4OphmOiwqw93JwRvS5TQIgdGm9tTGf3wXgZ1IUIMd1tw5NAcqZsvlx58RkFrPlEY0BATo42_fq4l/s320/Kicad-Save-As-kicad_pcb.png" width="320" /></a></div>
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Once saved in a kicad format (.kicad_pcb), the layout can then be loaded into <a href="http://repo.hu/projects/pcb-rnd/" target="_blank">pcb-rnd</a>, which can load these layouts natively:<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhg_29gPD3qfQ_4UHymmkE44dTquSyBwbQt3piG9O07fY7ftGhcAI8zefjMbTK2ovBTcwFP6_hVmejWyu9at0EXM3p8tpP6bVz2dzFUPVnPxicbJDaNuv10sjb2YfCWkCm32znZ-5gKZkXN/s1600/Sm1000-in-pcb-rnd.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhg_29gPD3qfQ_4UHymmkE44dTquSyBwbQt3piG9O07fY7ftGhcAI8zefjMbTK2ovBTcwFP6_hVmejWyu9at0EXM3p8tpP6bVz2dzFUPVnPxicbJDaNuv10sjb2YfCWkCm32znZ-5gKZkXN/s320/Sm1000-in-pcb-rnd.png" width="320" /></a></div>
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<a href="http://repo.hu/projects/pcb-rnd/" target="_blank">pcb-rnd</a> is a fork of the gEDA project's pcb layout tool, "PCB". From there, you can proceed with business as usual.<br />
<br />
In addition to the open hardware SM1000 design, the workflow was tested and pcb-rnd's s-expression import module refined with another example, this time from <a href="https://github.com/adafruit/Adafruit-PiTFT-3.5-Plus-PCB/blob/master/Adafruit%20PiTFT%20Plus%203.5in.brd" target="_blank">Adafruit</a>'s git repo, namely, an <br />
Adafruit-PiTFT-3.5-Plus-PCB touch screen PCB layout<br />
<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiDQmCL0RVeov-9-Vs2TZbGz_NE7zWG9kG-8BAAa1uZn_H9UwQ5jn58Foiwwm6wRRxkXjT8amOvUF84wtJpFR4ZEfeOoD71iLfORZfIpT1CfYw98Kqd0anvC7bXediUx0JZezA_d21pp9Q4/s1600/Eagle-To-GEDA-PCB-RND-TFT-board-converted.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="167" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiDQmCL0RVeov-9-Vs2TZbGz_NE7zWG9kG-8BAAa1uZn_H9UwQ5jn58Foiwwm6wRRxkXjT8amOvUF84wtJpFR4ZEfeOoD71iLfORZfIpT1CfYw98Kqd0anvC7bXediUx0JZezA_d21pp9Q4/s320/Eagle-To-GEDA-PCB-RND-TFT-board-converted.png" width="320" /></a></div>
<br />
Concluding remarks:<br />
<br />
An effective method now exists for sharing open hardware designs and community contributed design elements in Eagle's XML format with the gEDA ecosystem.<br />
<br />
gEDA toolchain users now have multiple options available for extracting design information from Eagle generated gerber files, Eagle board layout files, and Eagle library files with the techniques outlined.<br />
<br />
<br />
Caveats / fine print:<br />
<br />
These arise primarily from the non-surjective and non-injective mapping of features when translating from one EDA tool to another....<br />
<br />
1) As previously discussed, polygonal pad features will not be converted into gEDA compatible footprint features<br />
<br />
2) text size, kerning, justification and styles will be altered somewhat during translation through various EDA formats<br />
<br />
3) KiCad has some peculiar interactions between polygonal zones and via/pin definitions/thermal properties, meaning that these features need to be checked carefully in a converted board.<br />
<br />
4) KiCad tends to specify pullbacks from polygonal zones, which are not a feature of polygonal entities in gEDA.<br />
<br />
5) KiCad doesn't necessarily translate an imported Eagle layout into a sensible location within the KiCad layout, so you need to select the layout and move it into the layout's bordered area before saving it in .kicad_pcb format. Here's the SM1000 layout before being moved in KiCad's layout window.<br />
<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgjfQhu1HXMZ7vZBQmy_7Dycb53cee0KnT3BWE3WxVfHqABm9uzGQ0qNvhuN0ptlJwA-Wgl3Bt3hYlPjsU8_W0GZs9Ai-fFdzLoSbx6TqrFh0l3fCbLXzjF_YbMYk14p8WUdt7ox_wB67OZ/s1600/Kicad-Fails-To-Translate-Eagle-Layout.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgjfQhu1HXMZ7vZBQmy_7Dycb53cee0KnT3BWE3WxVfHqABm9uzGQ0qNvhuN0ptlJwA-Wgl3Bt3hYlPjsU8_W0GZs9Ai-fFdzLoSbx6TqrFh0l3fCbLXzjF_YbMYk14p8WUdt7ox_wB67OZ/s320/Kicad-Fails-To-Translate-Eagle-Layout.png" width="320" /></a></div>
<br />
<br />
6) converted files are likely to have in excess of 16 layers, which will require a recent build of pcb-rnd, or a recompiled version of mainline PCB with support for an increased number of layers with modifications to the relevant header files.<br />
<br />
Failing that, and probably the simplest layer limitation workaround for those disinclined to recompile, is to simply cut and paste the contents of each layer of interest with a text editor into the relevant layer sections of an existing empty layout (.pcb) file, along with the section defining the footprints prior to the layer definitions. If, after doing this, nothing appears in your layout, you need to resize your layout in the preference dialogue; the design is probably sitting outside of the board's defined area...<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEj2XK_J3UjGX50vLzIMTxPxvruZMWjx-uYiP_S7SCxJ99UcgA2Z750fAs82qqXz1pujxG5BVRA-esatu1zEFsA4ehfjMqKM1LgsdhOZ9AdgfqdjQzG68jh7FdjOJ5y5eRBnMevgcYtKFnK8/s1600/Text-Editing-Layer-Contents-For-Mainline-PCB.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEj2XK_J3UjGX50vLzIMTxPxvruZMWjx-uYiP_S7SCxJ99UcgA2Z750fAs82qqXz1pujxG5BVRA-esatu1zEFsA4ehfjMqKM1LgsdhOZ9AdgfqdjQzG68jh7FdjOJ5y5eRBnMevgcYtKFnK8/s320/Text-Editing-Layer-Contents-For-Mainline-PCB.png" width="320" /></a></div>
<br />Erichhttp://www.blogger.com/profile/06713492721272257911noreply@blogger.com0tag:blogger.com,1999:blog-3244641027778699849.post-77921944154762470152017-03-01T06:27:00.000-08:002017-03-01T06:27:34.433-08:00On the fly parametric footprint creation and editing in the pcb-rnd PCB layout editor plus gedaymbols support.pcb-rnd is a fork of gEDA's PCB layout editor, and aims to
continue adding features that improve functionality and improve interoperability with other FLOSS
EDA tools and leverage existing FLOSS EDA
ecosystem resources.<br />
<br />
Recent improvements to pcb-rnd include the ability to fine tune footprint parameters on the fly, even while working on a PCB layout, in an intuitive and simple to use parametric feature editing dialog window.<br />
<br />
The footprint insertion dialog is invoked by pressing the "i" key while editing a layout. In this respect, element insertion remains much the same as in mainlline gEDA PCB.<br />
<br />
Unlike mainline PCB, the pcb-rnd user has the ability to then browse the local filesystem libraries, specify and edit a parametric footprint, or retrieve a footprint from a web based repository if it has been specified in the preferences.<br />
<br />
Here's a resistor being specified parametrically for a layout being edited:<br />
<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjaNSdFXNijNEpEaS61YMx0eE0az6lGXZsm3rWax3dpkTvvrah55rrkZZZgtcGf3LVgsJ6HdfZ3ndW-xR9XvS7uDyqTnuDGEh_e0O6YQXNsxxk8-syNLttHH76OT6OxTp-uXo5Iuv-L5EDh/s1600/ACY1000-insertion.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="174" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjaNSdFXNijNEpEaS61YMx0eE0az6lGXZsm3rWax3dpkTvvrah55rrkZZZgtcGf3LVgsJ6HdfZ3ndW-xR9XvS7uDyqTnuDGEh_e0O6YQXNsxxk8-syNLttHH76OT6OxTp-uXo5Iuv-L5EDh/s320/ACY1000-insertion.png" width="320" /></a></div>
<br />
Here's a BGA footprint being specified on the fly:<br />
<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjaKDDywm9jkbbRRpEkRF2vkgADd_maCaaT4GZUtOPO27MY7xYDOJH5uvPS9_PkFT6isg7C8tcVhmn9PoBOlespoVc7_GBHlDFvyhCKDjLfxvYV8dSe8LcV-weySZfAgQ1hyphenhyphenxKdRJqZpRUH/s1600/BGA-footprint-creation-pcb-rnd.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="174" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjaKDDywm9jkbbRRpEkRF2vkgADd_maCaaT4GZUtOPO27MY7xYDOJH5uvPS9_PkFT6isg7C8tcVhmn9PoBOlespoVc7_GBHlDFvyhCKDjLfxvYV8dSe8LcV-weySZfAgQ1hyphenhyphenxKdRJqZpRUH/s320/BGA-footprint-creation-pcb-rnd.png" width="320" /></a></div>
<br />
Here, a standard BNC footprint is being added from the local library residing in the local filesystem: <br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgO3VBefK-89NvQvMFPGzZRpH8OOWaLubFriZ_DwWz_IX1E18avxU-W2rUAie5HHdtTh9OSLOFUaghvkEhdygiZ4AuSXtsH1RFon2AUDkIpruPrNzrNRdOneZ4KtEQU93cpyudCE6V9iZDC/s1600/BNC-insertion-pcb-rnd.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="174" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgO3VBefK-89NvQvMFPGzZRpH8OOWaLubFriZ_DwWz_IX1E18avxU-W2rUAie5HHdtTh9OSLOFUaghvkEhdygiZ4AuSXtsH1RFon2AUDkIpruPrNzrNRdOneZ4KtEQU93cpyudCE6V9iZDC/s320/BNC-insertion-pcb-rnd.png" width="320" /></a></div>
<br />
And here's a parametric DIP socket being specified on the fly in the parameter editing window:<br />
<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjadcCJDdbrOBFrpoPnj5HknrZtXxdLAt-StTdFtEHFvRs-uErXpbvQolCoIEdXlQ7feL_tlHEHT8DsFrSYRmL-9HU11-dDY9IlNu3cmI05BIOLopYmNoOvE56zPoFd3UPPoY1AIUmahC7A/s1600/parametric-DIP-insertion-pcb-rnd.png" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="174" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjadcCJDdbrOBFrpoPnj5HknrZtXxdLAt-StTdFtEHFvRs-uErXpbvQolCoIEdXlQ7feL_tlHEHT8DsFrSYRmL-9HU11-dDY9IlNu3cmI05BIOLopYmNoOvE56zPoFd3UPPoY1AIUmahC7A/s320/parametric-DIP-insertion-pcb-rnd.png" width="320" /></a></div>
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEg8EdPWIayUiQCuEhi3DKLyt2EewCG6EUNA1WkhqfQTVEA9ncCqT_cfKKSCoYI1g7A7Dqtjt33qhqPXJ0T3pBZ1n_TzkZ3eS67T-euxYu5A3VDLXuXckhGh0lMAc5lkGwW1ltcKCdT4slzq/s1600/fat-DIP-creation-pcb-rnd.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="174" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEg8EdPWIayUiQCuEhi3DKLyt2EewCG6EUNA1WkhqfQTVEA9ncCqT_cfKKSCoYI1g7A7Dqtjt33qhqPXJ0T3pBZ1n_TzkZ3eS67T-euxYu5A3VDLXuXckhGh0lMAc5lkGwW1ltcKCdT4slzq/s320/fat-DIP-creation-pcb-rnd.png" width="320" /></a></div>
<br />
A fatter than usual DIP has been created and placed on the layout: <br />
<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEh8GkeilhpavzRLQM20zsQk2Uy-HoV0SBMZ-Qyfu1pU1KtxBbPaRA8IFNnw29_hOjGd8DRlOuQGb_kLPi_GiS1El1zcPuxUz_EVjpn_oCdGaT93NR4YvZEXka-T1vvxeY5tkkqmyo40DSkV/s1600/fat-DIP-done-pcb-rnd.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="174" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEh8GkeilhpavzRLQM20zsQk2Uy-HoV0SBMZ-Qyfu1pU1KtxBbPaRA8IFNnw29_hOjGd8DRlOuQGb_kLPi_GiS1El1zcPuxUz_EVjpn_oCdGaT93NR4YvZEXka-T1vvxeY5tkkqmyo40DSkV/s320/fat-DIP-done-pcb-rnd.png" width="320" /></a></div>
<br />
In addition to the options of standard, inbuilt footprint libraries,
and parametric footprint creation, pcb-rnd has had the ability to
retrieve symbols from web repositories for some time.<br />
<br />
Once a compatible web based repository has been specified, pcb-rnd checks for
updates and caches a list of the available footprints whenever it starts
up. <br />
<br />
Here's a nixie tube footprint retrieved from gedasymbols.org. The nixie tube footprint was originally converted from a KiCad library, if memory serves correctly:<br />
<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjr2tTeCdH4Zkq-iS3q-nmzvASAVyOF9IaqSB5KFx7u9ol6w0vA7OMunKJd0-6wiAX1wIjm7BRe1WtG2czJO28wiGMsknpDj_LMsIC1tD1yMyL2ksr2PO4ikO2AEIw2ebkN3WmjVNgCEvF0/s1600/Insert-gedaSymbols-nixie.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="174" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjr2tTeCdH4Zkq-iS3q-nmzvASAVyOF9IaqSB5KFx7u9ol6w0vA7OMunKJd0-6wiAX1wIjm7BRe1WtG2czJO28wiGMsknpDj_LMsIC1tD1yMyL2ksr2PO4ikO2AEIw2ebkN3WmjVNgCEvF0/s320/Insert-gedaSymbols-nixie.png" width="320" /></a></div>
<br />
Importantly, any of the parameters generated interactively can also be embedded as footprint attributes in netlists exported by schematic editors, allowing parametric footprints to be specified from the schematic for automatic inclusion in the new layout.<br />
<br />
A simple example for gschem, the gEDA project's schematic editor, would be the following attribute for a resistor:<br />
<br />
footprint=acy(300)Erichhttp://www.blogger.com/profile/06713492721272257911noreply@blogger.com0tag:blogger.com,1999:blog-3244641027778699849.post-40139285394487455712017-02-21T06:31:00.000-08:002017-02-21T06:31:37.615-08:00Multiple font support now available in pcb-rnd Modifications to the pcb-rnd core, along with the new lihata (.lht) file format, have allowed multiple font support to be implemented relatively quickly.<br />
<br />
Fonts used in a layout are saved in the lihata file format file, but not if the layout is saved in the current gEDA PCB (.pcb) format.<br />
<br />
The multiple font support leverages previous work done converting Hershey format fonts sourced from the open source and open hardware EggBot platform.<br />
<br />
The <a href="https://github.com/erichVK5/translate2geda" target="_blank">translate2geda</a> utility can now batch convert the hersheydata.py font archive used by the EggBot. This has made around 50 fonts available for use.<br />
<br />
The fonts are managed with a font selector window: <br />
<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhdA0VSfAxvzl8nNZXiETqf4KO67e8yIztcBPDca1UdcGqpK5zYcpBhMfhrw7LsZ9L10bXxt_frrx_2OoFstD51NMYb6hc2LaVuEqTrMlfzSaP_Gdc5O0I8lTzzOdQlN8lE1xcNxjTpeISI/s1600/PCB-RND-FontSelectorWindow.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhdA0VSfAxvzl8nNZXiETqf4KO67e8yIztcBPDca1UdcGqpK5zYcpBhMfhrw7LsZ9L10bXxt_frrx_2OoFstD51NMYb6hc2LaVuEqTrMlfzSaP_Gdc5O0I8lTzzOdQlN8lE1xcNxjTpeISI/s320/PCB-RND-FontSelectorWindow.png" width="320" /></a></div>
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhDKTaarsD3sCzMjY-WoLmb8__wgLaawxgfkU0C8cOyRYIRfehrWrFe0bvK0V-Qg7dN86I7MARoI065D2hDe4zNce95d25SvM_cs3kDQaDRxk-GKorNu-nhs_vvIXo645Ab3aaQVBG3LTuR/s1600/SelectFont.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="179" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhDKTaarsD3sCzMjY-WoLmb8__wgLaawxgfkU0C8cOyRYIRfehrWrFe0bvK0V-Qg7dN86I7MARoI065D2hDe4zNce95d25SvM_cs3kDQaDRxk-GKorNu-nhs_vvIXo645Ab3aaQVBG3LTuR/s320/SelectFont.png" width="320" /></a></div>
<br />
After loading and selecting a font, it can then be used:<br />
<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEisAsIlh9yF5hDVbOmnlOqvYgpKpEXKA0-txWdkIILTRCZDwFpNv20i0eYqXQSjQbVM9kt5Z-FUchfch-QveFylFSIl1Ke8IKQE1DYLncevqkCE8An38ixyEWZqN_OUb4uWUfmSgdIoYB0l/s1600/pcb-rnd-multiple-font-demo.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEisAsIlh9yF5hDVbOmnlOqvYgpKpEXKA0-txWdkIILTRCZDwFpNv20i0eYqXQSjQbVM9kt5Z-FUchfch-QveFylFSIl1Ke8IKQE1DYLncevqkCE8An38ixyEWZqN_OUb4uWUfmSgdIoYB0l/s320/pcb-rnd-multiple-font-demo.png" width="320" /></a></div>
<br />
Fonts can also be specified for element text attributes, i.e. the RefDes, since element text attributes in the lihata file now include a font ID, allowing a RefDes to have something other than the default font used for rendering:<br />
<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiSmqkeiEiluiQ7UI6BZiweRhL6eO6teZ6D5H5r2V26FeoXwKmDh8OT0dOxoVzILmUU0VbCBVCslgflnD6KbDIyqk1kJnvi63jEcZgHHNvv_2CPN5KI2OzYgIXCrhuVoT9vc_fINpVD2vJu/s1600/RefDesFontsToo.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiSmqkeiEiluiQ7UI6BZiweRhL6eO6teZ6D5H5r2V26FeoXwKmDh8OT0dOxoVzILmUU0VbCBVCslgflnD6KbDIyqk1kJnvi63jEcZgHHNvv_2CPN5KI2OzYgIXCrhuVoT9vc_fINpVD2vJu/s320/RefDesFontsToo.png" width="320" /></a></div>
<br />
It should be noted that any particular font is still subject to a 127 char symbol space limit.<br />
<br />
Mapping for Greek and Cyrillic is phonetic, and the Hebrew font adheres to a common keyboard mapping.<br />
<br />
Apologies to any fluent Greek, Russian or Hebrew speakers who might take exception to Google Translate's advice during the making of the screenshot! <br />
<br />
I expect that the Greek font should come in useful for "mu" and "Omega" in particular, no matter what the local language is.<br />
<br />
The new font support is available from the pcb-rnd <a href="http://repo.hu/projects/pcb-rnd/" target="_blank">svn</a>.<br />
<br />
Enjoy responsibly!!<br />
<br />
P.S. For those unaware, <a href="https://github.com/erichVK5/FootprintTextForPCB">https://github.com/erichVK5/FootprintTextForPCB </a><br />
can be used for rendering text labels within footprints being created for use within both gEDA PCB and pcb-rnd.Erichhttp://www.blogger.com/profile/06713492721272257911noreply@blogger.com0tag:blogger.com,1999:blog-3244641027778699849.post-44691560216095000972017-02-20T04:22:00.001-08:002017-02-20T04:22:17.526-08:00Importing Kicad eeschema netlists into gEDA pcb-rnd<h3 class="post-title entry-title" itemprop="name">
</h3>
<div class="post-header">
</div>
Taking further advantage of the gEDA PCB fork <a href="http://repo.hu/projects/pcb-rnd/" target="_blank">pcb-rnd</a>'s modular architecture, a new import module to allow KiCad <a href="http://kicad-pcb.org/discover/eeschema/" target="_blank">Eeschema</a> netlists to be imported has been developed.<br /><br />
A fundamental motivation behind these import/export efforts is to grow the FLOSS EDA ecosystem, by enabling greater sharing of existing efforts within the intellectual commons.<br />
<br />
The modularity of pcb-rnd is such that a sample pack consisting of a schematic, screenshot and exported netlist, is usually sufficient to implement a new import module.<br />
<br />
This was done for KiCad's Eeschema, and an import module was soon working.<br />
<br />
Here's an example schematic in Eeschema, the schematic editor used by KiCad:<br />
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<br />
Here's the netlist export dialog being launched:<br />
<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEisD4JjJ6nFLt7DKX5UhqnWX0AWq-oo0b79cImZAzvcA_EHZPYdO7k0kgKHg5m_NHBvZWfXfKkoHdg3R9Usa6H_P444Fq2hBVFLxalON3nYStaSGcXxIGjWiVQ1VzWSHivy_9pGagpgYmGJ/s1600/GenerateNetlistMenuItem.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEisD4JjJ6nFLt7DKX5UhqnWX0AWq-oo0b79cImZAzvcA_EHZPYdO7k0kgKHg5m_NHBvZWfXfKkoHdg3R9Usa6H_P444Fq2hBVFLxalON3nYStaSGcXxIGjWiVQ1VzWSHivy_9pGagpgYmGJ/s320/GenerateNetlistMenuItem.png" width="320" /></a></div>
<br />
The default netlist export format is selected:<br />
<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEi8cQ0yX430ZW0LY0afiwsW63V2a7gcBPJZbP5ldA8FDkzqDMYUA8AzswOnd83dtoI6cijOmbMKXXdpMl0OMGs2IbqS6h8B1Cw2zdVlhRDm74Pe7AOc1ve0FH8eLHeC8TaOMmdPSjRlfnnH/s1600/LegacyAndAdvancedPcbnewExportOptions.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="179" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEi8cQ0yX430ZW0LY0afiwsW63V2a7gcBPJZbP5ldA8FDkzqDMYUA8AzswOnd83dtoI6cijOmbMKXXdpMl0OMGs2IbqS6h8B1Cw2zdVlhRDm74Pe7AOc1ve0FH8eLHeC8TaOMmdPSjRlfnnH/s320/LegacyAndAdvancedPcbnewExportOptions.png" width="320" /></a></div>
<br />
And after using the file:import menu item in pcb-rnd:<br />
<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgClL36yeU9vIYOoNBEgk0-8afj9qNDIyue16j7e9uX0eK8ww0By0zIq_N0BwIT-hITaIDBSUOblOutP6QvFw-ktP1MvUg0u_OIvq47ApFN1pXER0Y0AGnc94lTqae3z3cAKRbQB2NSnuDg/s1600/ImportMenuInPCBRND.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgClL36yeU9vIYOoNBEgk0-8afj9qNDIyue16j7e9uX0eK8ww0By0zIq_N0BwIT-hITaIDBSUOblOutP6QvFw-ktP1MvUg0u_OIvq47ApFN1pXER0Y0AGnc94lTqae3z3cAKRbQB2NSnuDg/s320/ImportMenuInPCBRND.png" width="320" /></a></div>
<br />
We get the new layout, and after rearranging, end up with:<br />
<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiR3dsHJ4HB08jfBYB0YxRTVPYHXYEhUQGQon-rG5B8xaPo-xTKb08S93xnEK_MPGjFHVTIiGuqt5bLIBxh0UK31pasHh_fKpbEoDPD0HEMNmjtpUXAwL26g_UFOGgrzLsLahBfYyE5MaJI/s1600/TransAmpImportedToPCBRND.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiR3dsHJ4HB08jfBYB0YxRTVPYHXYEhUQGQon-rG5B8xaPo-xTKb08S93xnEK_MPGjFHVTIiGuqt5bLIBxh0UK31pasHh_fKpbEoDPD0HEMNmjtpUXAwL26g_UFOGgrzLsLahBfYyE5MaJI/s320/TransAmpImportedToPCBRND.png" width="320" /></a></div>
<br />
Although the gEDA project's schematic editor, <a href="http://wiki.geda-project.org/geda:gschem_warmup" target="_blank">gschem,</a> has powerful features such as arbitrary numbers of component attributes along with flexible and customizable netlist export options, there are likely to be existing designs or prospective gEDA users who would like to bring their existing designs with them.<br />
<br />
The Kicad Eeschema import plugin is now available and enabled by default in the <a href="svn://repo.hu/pcb-rnd/trunk" target="_blank">svn</a>, and is expected to be in the next formal pcb-rnd release.<br />
<br />
Further import plugins are planned for other schematic layout
tools. If you have a tool you'd like to use with pcb-rnd, get in touch
at <a href="http://repo.hu/projects/pcb-rnd/">http://repo.hu/projects/pcb-rnd/</a> and if it isn't a closed binary format, we should be able to make it
happen pretty quickly.<br />
<br />Erichhttp://www.blogger.com/profile/06713492721272257911noreply@blogger.com0tag:blogger.com,1999:blog-3244641027778699849.post-21847132843180722102017-02-10T00:01:00.000-08:002017-02-10T00:04:44.907-08:00Importing TinyCad schematics into gEDA pcb-rndAs previously discussed, the gEDA PCB fork <a href="http://repo.hu/projects/pcb-rnd/" target="_blank">pcb-rnd</a> has a modular architecture allowing import and export modules to be developed quickly.<br />
<br />
Furthering the
latest development efforts aimed at increasing the number
of schematic layout tools that pcb-rnd can obtain netlists from, a new module has been written to allow netlists from the FOSS schematic editor TinyCad to be imported.<br />
<br />
TinyCad is a windows application that runs quite happily on Linux under <a href="https://www.winehq.org/" target="_blank">wine</a>.<br />
<br />
The gEDA project's schematic editor, <a href="http://wiki.geda-project.org/geda:gschem_warmup" target="_blank">gschem,</a> continues to be a powerful, flexible and extensible schematic editor, but guile library availability on windows has at times lagged that on *nix, making alternatives to gschem valuable.<br />
<br />
The import module is able to import a TinyCad netlist exported from TinyCad in TinyCad's own plain text netlist format.<br />
<br />
<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEikJqwv3XvIdIF5HPEk2SEHkLdTCmKyoy-v9rO0qATEGzgmjujP9w_OXf9mX7LwX5SVRVDkqUMFzvWfpHAU0EnO8Pyitw9InojLqKV22pfNUlDvHHxg6_zafxuBeyB2qmUYE_WlYD7yNr8L/s1600/StartToExportTinycadNetlist.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="176" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEikJqwv3XvIdIF5HPEk2SEHkLdTCmKyoy-v9rO0qATEGzgmjujP9w_OXf9mX7LwX5SVRVDkqUMFzvWfpHAU0EnO8Pyitw9InojLqKV22pfNUlDvHHxg6_zafxuBeyB2qmUYE_WlYD7yNr8L/s320/StartToExportTinycadNetlist.png" width="320" /></a></div>
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgGyBGCnh3JhozzlE98ivDOKuyFbgPwAEK6y_9xjN9iJC8XqTSoAlJN6xixk0LilSUMQ_jVcvM9l0-NT9_FpvJ4PUeD_RqGS-z0uxYGbXyU2-5dvlI87DJ5_exJttR0TzX1iCEPEFSzjKMB/s1600/ExportingTinycadNetlistFormat.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="175" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgGyBGCnh3JhozzlE98ivDOKuyFbgPwAEK6y_9xjN9iJC8XqTSoAlJN6xixk0LilSUMQ_jVcvM9l0-NT9_FpvJ4PUeD_RqGS-z0uxYGbXyU2-5dvlI87DJ5_exJttR0TzX1iCEPEFSzjKMB/s320/ExportingTinycadNetlistFormat.png" width="320" /></a></div>
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<br /></div>
The TinyCad netlist file (designName.net) contains enough information to allow
pcb-rnd to populate a new layout with associated connection data.<br />
<br />
TinyCad is quite flexible, and allows a footprint attribute, i.e. a "Package", to be associated with a component.<br />
<br />
This is done easily by clicking on a component to make the attribute inspector appear<br />
<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgRpPMHp02KOB0inwLO-h6x-6F3TsGH1W9f9v0rT5TtEGxK5Vgquv4U34kUjn4SaWNQhg-u5jAP6D0C3kXxxuPrx5HTVfp3LYtVOeGsa-RyVUehKSdG7cczI9CquP9130-_MMjBH4pwekDp/s1600/SelectDeviceToEdit.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="172" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgRpPMHp02KOB0inwLO-h6x-6F3TsGH1W9f9v0rT5TtEGxK5Vgquv4U34kUjn4SaWNQhg-u5jAP6D0C3kXxxuPrx5HTVfp3LYtVOeGsa-RyVUehKSdG7cczI9CquP9130-_MMjBH4pwekDp/s320/SelectDeviceToEdit.png" width="320" /></a></div>
<br />
At which point a standard pcb-rnd compatible package can be specified in the window, i.e. 1206 for an SMD resistor:<br />
<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhkmGRrHVwlaRC6SeLav3a1h5lu2ZteG3ue8Q9l2ZX5I61yegPxdgNrhoaz3B9M98WPWiRbIZZYAXGkufCL7AQZGeLzGN1NC_8g5OklxVLB91m2YybnMeF__b5M8LKcR4q-ZXILAkHtDbJs/s1600/EditingFootprintTinyCad.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="173" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhkmGRrHVwlaRC6SeLav3a1h5lu2ZteG3ue8Q9l2ZX5I61yegPxdgNrhoaz3B9M98WPWiRbIZZYAXGkufCL7AQZGeLzGN1NC_8g5OklxVLB91m2YybnMeF__b5M8LKcR4q-ZXILAkHtDbJs/s320/EditingFootprintTinyCad.png" width="320" /></a></div>
<br />
The same design used for the LT-Spice netlist import example has been used for this example, to allow comparisons to be made.<br />
<br />
<br />
<br />
Clearly, TinyCad is much more suited to an easy schematic -> pcb-rnd workflow than the current version of LT-Spice tested (v4).<br />
<br />
Having exported the TinyCad plain text netlist from TinyCad, the next thing is to start pcb-rnd.<br />
<br />
In pcb-rnd, the netlist can be imported, either with a command<br />
<br />
:LoadTinycadFrom(/home/user/path/to/design.net)<br />
<br />
or via the file menu:<br />
<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgprIn_YMYy1Bla2ebDR_CvYr8UQ0Rs_997R1iN_ZO8H_RrsfROLFU3eDfx4ZZgcSq2evq31TZHk1MBtRNCqsunZke7OPFDfPEU7NDe4XVdDwDxIXErvMkoELOlA_xOLVthLeyPZEQFTijr/s1600/ImportMenu.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgprIn_YMYy1Bla2ebDR_CvYr8UQ0Rs_997R1iN_ZO8H_RrsfROLFU3eDfx4ZZgcSq2evq31TZHk1MBtRNCqsunZke7OPFDfPEU7NDe4XVdDwDxIXErvMkoELOlA_xOLVthLeyPZEQFTijr/s320/ImportMenu.png" width="320" /></a></div>
<br />
<br />
<br />
<br />
The parts and connections (rat lines) will then appear<br />
<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjkIyi0fv1Jf0-3dG6QpCHJg7LwirNhu66bSenQpGF4q10YwbY3OqcWraq7ZMYXd_L4QTiQc0GGpQP4S7DummVhPcgZ27CVi3FdOPG-xh5Dxmg6txq7WzzB4gXQ6v_C7zpctwtOE4v5qwEP/s1600/NetlistLoadedFromTinycad.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="174" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjkIyi0fv1Jf0-3dG6QpCHJg7LwirNhu66bSenQpGF4q10YwbY3OqcWraq7ZMYXd_L4QTiQc0GGpQP4S7DummVhPcgZ27CVi3FdOPG-xh5Dxmg6txq7WzzB4gXQ6v_C7zpctwtOE4v5qwEP/s320/NetlistLoadedFromTinycad.png" width="320" /></a></div>
<br />
the parts can then be selected and dispersed <br />
<br />
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<br />
and then re-arranged into a nice grouping, ready for routing.<br />
<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgJHNhvxc0JM5iMVwCnBad1kUT8D1X5KBMeYAyS0cvDdCFTtsz_wnNIC5RcG0WZWCw2WQZFa2L4j3ExJXsGp9LzNFrdKvBSy-gTp67SV0CxzFEE0kRMQyALf8sCRqJZsVy_bi2xSgH-t_G-/s1600/FinalNetworkFromTinyCad.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="168" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgJHNhvxc0JM5iMVwCnBad1kUT8D1X5KBMeYAyS0cvDdCFTtsz_wnNIC5RcG0WZWCw2WQZFa2L4j3ExJXsGp9LzNFrdKvBSy-gTp67SV0CxzFEE0kRMQyALf8sCRqJZsVy_bi2xSgH-t_G-/s320/FinalNetworkFromTinyCad.png" width="320" /></a></div>
<br />
So, we see we end up with much the same result as that achieved with LT-Spice netlist import, reproduced here:<br />
<br />
<br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhpT1deExvhzB3wbSk9acu3-wAmu2zCjjaVJXpKJqy6UouxcagRThACR6xeV7dBHjpYhrgnjgRgZW22Ep5qhRJf0Pcp1xI8XcUj1-_GE5P7TAxGqwuavepr5Tj4oehW30LUDYJ5E20IadT5/s1600/FinalProduct.png" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="236" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhpT1deExvhzB3wbSk9acu3-wAmu2zCjjaVJXpKJqy6UouxcagRThACR6xeV7dBHjpYhrgnjgRgZW22Ep5qhRJf0Pcp1xI8XcUj1-_GE5P7TAxGqwuavepr5Tj4oehW30LUDYJ5E20IadT5/s320/FinalProduct.png" width="320" /></a></div>
<br />
As this example shows, the workflow from TinyCad to pcb-rnd is more natural and goes more smoothly than from LT-Spice.<br />
<br />
The following points can be made:<br />
<br />
1) TinyCad is more capable in terms of allowing additional attributes to be specified for components,<br />
<br />
2)
If you look closely at the two final layouts, the two workflows nicely illustrate "The
transistor problem", in which different schematic symbols may map to
different TO-92 pins, or the pins of whatever other package you choose.<br />
<br />
3) connectors were specified for the sake of example for the power supply and input signal in the TinyCad example.<br />
<br />The TinyCad import plugin is now available and enabled by default in the <a href="svn://repo.hu/pcb-rnd/trunk" target="_blank">svn</a>, and is expected to be in the next formal pcb-rnd release.<br />
<br />
Additional import plugins are planned for other schematic layout
tools. If you have a tool you'd like to use with pcb-rnd, get in touch
at <a href="http://repo.hu/projects/pcb-rnd/">http://repo.hu/projects/pcb-rnd/</a> and we can see about making it
happen.Erichhttp://www.blogger.com/profile/06713492721272257911noreply@blogger.com0